Lines Matching +full:wdt +full:- +full:sd
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <dt-bindings/clock/r7s72100-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
32 #clock-cells = <0>;
33 compatible = "fixed-factor-clock";
35 clock-mult = <1>;
36 clock-div = <3>;
40 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
47 #address-cells = <1>;
48 #size-cells = <0>;
52 compatible = "arm,cortex-a9";
54 clock-frequency = <400000000>;
56 next-level-cache = <&L2>;
62 #clock-cells = <0>;
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
69 #clock-cells = <0>;
70 compatible = "fixed-factor-clock";
72 clock-mult = <1>;
73 clock-div = <12>;
77 #clock-cells = <0>;
78 compatible = "fixed-factor-clock";
80 clock-mult = <1>;
81 clock-div = <6>;
85 compatible = "arm,cortex-a9-pmu";
86 interrupts-extended = <&gic GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
90 #clock-cells = <0>;
91 compatible = "fixed-clock";
93 clock-frequency = <0>;
97 #clock-cells = <0>;
98 compatible = "fixed-clock";
100 clock-frequency = <0>;
104 compatible = "simple-bus";
105 interrupt-parent = <&gic>;
107 #address-cells = <1>;
108 #size-cells = <1>;
111 L2: cache-controller@3ffff000 {
112 compatible = "arm,pl310-cache";
115 arm,early-bresp-disable;
116 arm,full-line-zero-disable;
117 cache-unified;
118 cache-level = <2>;
122 compatible = "renesas,scif-r7s72100", "renesas,scif";
129 clock-names = "fck";
130 power-domains = <&cpg_clocks>;
135 compatible = "renesas,scif-r7s72100", "renesas,scif";
142 clock-names = "fck";
143 power-domains = <&cpg_clocks>;
148 compatible = "renesas,scif-r7s72100", "renesas,scif";
155 clock-names = "fck";
156 power-domains = <&cpg_clocks>;
161 compatible = "renesas,scif-r7s72100", "renesas,scif";
168 clock-names = "fck";
169 power-domains = <&cpg_clocks>;
174 compatible = "renesas,scif-r7s72100", "renesas,scif";
181 clock-names = "fck";
182 power-domains = <&cpg_clocks>;
187 compatible = "renesas,scif-r7s72100", "renesas,scif";
194 clock-names = "fck";
195 power-domains = <&cpg_clocks>;
200 compatible = "renesas,scif-r7s72100", "renesas,scif";
207 clock-names = "fck";
208 power-domains = <&cpg_clocks>;
213 compatible = "renesas,scif-r7s72100", "renesas,scif";
220 clock-names = "fck";
221 power-domains = <&cpg_clocks>;
226 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
231 interrupt-names = "error", "rx", "tx";
233 power-domains = <&cpg_clocks>;
234 num-cs = <1>;
235 #address-cells = <1>;
236 #size-cells = <0>;
241 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
246 interrupt-names = "error", "rx", "tx";
248 power-domains = <&cpg_clocks>;
249 num-cs = <1>;
250 #address-cells = <1>;
251 #size-cells = <0>;
256 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
261 interrupt-names = "error", "rx", "tx";
263 power-domains = <&cpg_clocks>;
264 num-cs = <1>;
265 #address-cells = <1>;
266 #size-cells = <0>;
271 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
276 interrupt-names = "error", "rx", "tx";
278 power-domains = <&cpg_clocks>;
279 num-cs = <1>;
280 #address-cells = <1>;
281 #size-cells = <0>;
286 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
291 interrupt-names = "error", "rx", "tx";
293 power-domains = <&cpg_clocks>;
294 num-cs = <1>;
295 #address-cells = <1>;
296 #size-cells = <0>;
301 compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
306 power-domains = <&cpg_clocks>;
311 compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
316 power-domains = <&cpg_clocks>;
321 compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
327 power-domains = <&cpg_clocks>;
328 reg-io-width = <4>;
329 bus-width = <8>;
334 compatible = "renesas,sdhi-r7s72100";
342 clock-names = "core", "cd";
343 power-domains = <&cpg_clocks>;
344 cap-sd-highspeed;
345 cap-sdio-irq;
350 compatible = "renesas,sdhi-r7s72100";
358 clock-names = "core", "cd";
359 power-domains = <&cpg_clocks>;
360 cap-sd-highspeed;
361 cap-sdio-irq;
365 gic: interrupt-controller@e8201000 {
367 #interrupt-cells = <3>;
368 #address-cells = <0>;
369 interrupt-controller;
375 compatible = "renesas,ether-r7s72100";
380 power-domains = <&cpg_clocks>;
381 phy-mode = "mii";
382 #address-cells = <1>;
383 #size-cells = <0>;
389 compatible = "renesas,r7s72100-ceu";
392 power-domains = <&cpg_clocks>;
396 wdt: watchdog@fcfe0000 {
397 compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
405 #clock-cells = <1>;
406 compatible = "renesas,r7s72100-cpg-clocks",
407 "renesas,rz-cpg-clocks";
410 clock-output-names = "pll", "i", "g";
411 #power-domain-cells = <0>;
416 #clock-cells = <1>;
417 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
420 clock-indices = <R7S72100_CLK_MTU2>;
421 clock-output-names = "mtu2";
425 #clock-cells = <1>;
426 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
430 clock-indices = <
434 clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
438 #clock-cells = <1>;
439 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
442 clock-indices = <R7S72100_CLK_OSTM0 R7S72100_CLK_OSTM1>;
443 clock-output-names = "ostm0", "ostm1";
447 #clock-cells = <1>;
448 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
451 clock-indices = <R7S72100_CLK_CEU R7S72100_CLK_RTC>;
452 clock-output-names = "ceu", "rtc";
456 #clock-cells = <1>;
457 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
460 clock-indices = <R7S72100_CLK_ETHER R7S72100_CLK_USB0 R7S72100_CLK_USB1>;
461 clock-output-names = "ether", "usb0", "usb1";
465 #clock-cells = <1>;
466 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
469 clock-indices = <R7S72100_CLK_MMCIF>;
470 clock-output-names = "mmcif";
474 #clock-cells = <1>;
475 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
478 clock-indices = <
482 clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3", "spibsc0", "spibsc1";
486 #clock-cells = <1>;
487 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
491 clock-indices = <
495 clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
498 #clock-cells = <1>;
499 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
502 clock-indices = <
506 clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
510 compatible = "renesas,r7s72100-ports";
514 port0: gpio-0 {
515 gpio-controller;
516 #gpio-cells = <2>;
517 gpio-ranges = <&pinctrl 0 0 6>;
520 port1: gpio-1 {
521 gpio-controller;
522 #gpio-cells = <2>;
523 gpio-ranges = <&pinctrl 0 16 16>;
526 port2: gpio-2 {
527 gpio-controller;
528 #gpio-cells = <2>;
529 gpio-ranges = <&pinctrl 0 32 16>;
532 port3: gpio-3 {
533 gpio-controller;
534 #gpio-cells = <2>;
535 gpio-ranges = <&pinctrl 0 48 16>;
538 port4: gpio-4 {
539 gpio-controller;
540 #gpio-cells = <2>;
541 gpio-ranges = <&pinctrl 0 64 16>;
544 port5: gpio-5 {
545 gpio-controller;
546 #gpio-cells = <2>;
547 gpio-ranges = <&pinctrl 0 80 11>;
550 port6: gpio-6 {
551 gpio-controller;
552 #gpio-cells = <2>;
553 gpio-ranges = <&pinctrl 0 96 16>;
556 port7: gpio-7 {
557 gpio-controller;
558 #gpio-cells = <2>;
559 gpio-ranges = <&pinctrl 0 112 16>;
562 port8: gpio-8 {
563 gpio-controller;
564 #gpio-cells = <2>;
565 gpio-ranges = <&pinctrl 0 128 16>;
568 port9: gpio-9 {
569 gpio-controller;
570 #gpio-cells = <2>;
571 gpio-ranges = <&pinctrl 0 144 8>;
574 port10: gpio-10 {
575 gpio-controller;
576 #gpio-cells = <2>;
577 gpio-ranges = <&pinctrl 0 160 16>;
580 port11: gpio-11 {
581 gpio-controller;
582 #gpio-cells = <2>;
583 gpio-ranges = <&pinctrl 0 176 16>;
588 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
592 power-domains = <&cpg_clocks>;
597 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
601 power-domains = <&cpg_clocks>;
606 #address-cells = <1>;
607 #size-cells = <0>;
608 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
618 interrupt-names = "tei", "ri", "ti", "spi", "sti",
621 clock-frequency = <100000>;
622 power-domains = <&cpg_clocks>;
627 #address-cells = <1>;
628 #size-cells = <0>;
629 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
639 interrupt-names = "tei", "ri", "ti", "spi", "sti",
642 clock-frequency = <100000>;
643 power-domains = <&cpg_clocks>;
648 #address-cells = <1>;
649 #size-cells = <0>;
650 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
660 interrupt-names = "tei", "ri", "ti", "spi", "sti",
663 clock-frequency = <100000>;
664 power-domains = <&cpg_clocks>;
669 #address-cells = <1>;
670 #size-cells = <0>;
671 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
681 interrupt-names = "tei", "ri", "ti", "spi", "sti",
684 clock-frequency = <100000>;
685 power-domains = <&cpg_clocks>;
689 irqc: interrupt-controller@fcfef800 {
690 compatible = "renesas,r7s72100-irqc",
691 "renesas,rza1-irqc";
692 #interrupt-cells = <2>;
693 #address-cells = <0>;
694 interrupt-controller;
696 interrupt-map =
705 interrupt-map-mask = <7 0>;
709 compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
712 interrupt-names = "tgi0a";
714 clock-names = "fck";
715 power-domains = <&cpg_clocks>;
720 compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
725 interrupt-names = "alarm", "period", "carry";
728 clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
729 power-domains = <&cpg_clocks>;
735 #clock-cells = <0>;
736 compatible = "fixed-clock";
738 clock-frequency = <0>;