Lines Matching +full:iic +full:- +full:emev2

1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
12 	compatible = "renesas,emev2";
13 	interrupt-parent = <&gic>;
14 	#address-cells = <1>;
15 	#size-cells = <1>;
28 		#address-cells = <1>;
29 		#size-cells = <0>;
33 			compatible = "arm,cortex-a9";
35 			clock-frequency = <533000000>;
39 			compatible = "arm,cortex-a9";
41 			clock-frequency = <533000000>;
45 	gic: interrupt-controller@e0020000 {
47 		interrupt-controller;
48 		#interrupt-cells = <3>;
54 		compatible = "arm,cortex-a9-pmu";
57 		interrupt-affinity = <&cpu0>, <&cpu1>;
61 		compatible = "renesas,emev2-smu";
63 		#address-cells = <2>;
64 		#size-cells = <0>;
67 			compatible = "fixed-clock";
68 			clock-frequency = <32768>;
69 			#clock-cells = <0>;
72 			compatible = "renesas,emev2-smu-clkdiv";
75 			#clock-cells = <0>;
78 			compatible = "renesas,emev2-smu-gclk";
81 			#clock-cells = <0>;
84 			compatible = "renesas,emev2-smu-clkdiv";
87 			#clock-cells = <0>;
90 			compatible = "renesas,emev2-smu-gclk";
93 			#clock-cells = <0>;
96 			compatible = "fixed-factor-clock";
98 			clock-div = <1>;
99 			clock-mult = <7000>;
100 			#clock-cells = <0>;
103 			compatible = "renesas,emev2-smu-clkdiv";
106 			#clock-cells = <0>;
109 			compatible = "renesas,emev2-smu-clkdiv";
112 			#clock-cells = <0>;
115 			compatible = "renesas,emev2-smu-clkdiv";
118 			#clock-cells = <0>;
121 			compatible = "renesas,emev2-smu-clkdiv";
124 			#clock-cells = <0>;
127 			compatible = "renesas,emev2-smu-gclk";
130 			#clock-cells = <0>;
133 			compatible = "renesas,emev2-smu-gclk";
136 			#clock-cells = <0>;
139 			compatible = "renesas,emev2-smu-gclk";
142 			#clock-cells = <0>;
145 			compatible = "renesas,emev2-smu-gclk";
148 			#clock-cells = <0>;
151 			compatible = "renesas,emev2-smu-gclk";
154 			#clock-cells = <0>;
159 		compatible = "renesas,em-sti";
163 		clock-names = "sclk";
167 		compatible = "renesas,em-uart";
171 		clock-names = "sclk";
175 		compatible = "renesas,em-uart";
179 		clock-names = "sclk";
183 		compatible = "renesas,em-uart";
187 		clock-names = "sclk";
191 		compatible = "renesas,em-uart";
195 		clock-names = "sclk";
199 		compatible = "renesas,pfc-emev2";
204 		compatible = "renesas,em-gio";
208 		gpio-controller;
209 		gpio-ranges = <&pfc 0 0 32>;
210 		#gpio-cells = <2>;
212 		interrupt-controller;
213 		#interrupt-cells = <2>;
217 		compatible = "renesas,em-gio";
221 		gpio-controller;
222 		gpio-ranges = <&pfc 0 32 32>;
223 		#gpio-cells = <2>;
225 		interrupt-controller;
226 		#interrupt-cells = <2>;
230 		compatible = "renesas,em-gio";
234 		gpio-controller;
235 		gpio-ranges = <&pfc 0 64 32>;
236 		#gpio-cells = <2>;
238 		interrupt-controller;
239 		#interrupt-cells = <2>;
243 		compatible = "renesas,em-gio";
247 		gpio-controller;
248 		gpio-ranges = <&pfc 0 96 32>;
249 		#gpio-cells = <2>;
251 		interrupt-controller;
252 		#interrupt-cells = <2>;
256 		compatible = "renesas,em-gio";
260 		gpio-controller;
261 		gpio-ranges = <&pfc 0 128 31>;
262 		#gpio-cells = <2>;
264 		interrupt-controller;
265 		#interrupt-cells = <2>;
269 		#address-cells = <1>;
270 		#size-cells = <0>;
271 		compatible = "renesas,iic-emev2";
275 		clock-names = "sclk";
280 		#address-cells = <1>;
281 		#size-cells = <0>;
282 		compatible = "renesas,iic-emev2";
286 		clock-names = "sclk";