Lines Matching +full:0 +full:xe0070000

29 		#size-cells = <0>;
31 		cpu0: cpu@0 {
34 			reg = <0>;
49 		reg = <0xe0028000 0x1000>,
50 		      <0xe0020000 0x0100>;
62 		reg = <0xe0110000 0x10000>;
64 		#size-cells = <0>;
69 			#clock-cells = <0>;
71 		iic0_sclkdiv: iic0_sclkdiv@624,0 {
73 			reg = <0x624 0>;
75 			#clock-cells = <0>;
79 			reg = <0x48c 1>;
81 			#clock-cells = <0>;
85 			reg = <0x624 16>;
87 			#clock-cells = <0>;
91 			reg = <0x490 1>;
93 			#clock-cells = <0>;
100 			#clock-cells = <0>;
102 		usia_u0_sclkdiv: usia_u0_sclkdiv@610,0 {
104 			reg = <0x610 0>;
106 			#clock-cells = <0>;
108 		usib_u1_sclkdiv: usib_u1_sclkdiv@65c,0 {
110 			reg = <0x65c 0>;
112 			#clock-cells = <0>;
116 			reg = <0x65c 16>;
118 			#clock-cells = <0>;
120 		usib_u3_sclkdiv: usib_u3_sclkdiv@660,0 {
122 			reg = <0x660 0>;
124 			#clock-cells = <0>;
128 			reg = <0x4a0 1>;
130 			#clock-cells = <0>;
134 			reg = <0x4b8 1>;
136 			#clock-cells = <0>;
140 			reg = <0x4bc 1>;
142 			#clock-cells = <0>;
146 			reg = <0x4c0 1>;
148 			#clock-cells = <0>;
152 			reg = <0x528 1>;
154 			#clock-cells = <0>;
160 		reg = <0xe0180000 0x54>;
168 		reg = <0xe1020000 0x38>;
176 		reg = <0xe1030000 0x38>;
184 		reg = <0xe1040000 0x38>;
192 		reg = <0xe1050000 0x38>;
200 		reg = <0xe0140200 0x100>;
205 		reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
209 		gpio-ranges = <&pfc 0 0 32>;
218 		reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
222 		gpio-ranges = <&pfc 0 32 32>;
231 		reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
235 		gpio-ranges = <&pfc 0 64 32>;
244 		reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
248 		gpio-ranges = <&pfc 0 96 32>;
257 		reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
261 		gpio-ranges = <&pfc 0 128 31>;
270 		#size-cells = <0>;
272 		reg = <0xe0070000 0x28>;
281 		#size-cells = <0>;
283 		reg = <0xe10a0000 0x28>;