Lines Matching +full:iso +full:- +full:8 +full:x8
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 * Copyright (c) 2017-2019 Andreas Färber
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/realtek,rtd1195.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a7";
27 clock-frequency = <1000000000>;
32 compatible = "arm,cortex-a7";
34 clock-frequency = <1000000000>;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
57 no-map;
61 arm-pmu {
62 compatible = "arm,cortex-a7-pmu";
65 interrupt-affinity = <&cpu0>, <&cpu1>;
69 compatible = "arm,armv7-timer";
78 clock-frequency = <27000000>;
82 compatible = "fixed-clock";
83 clock-frequency = <27000000>;
84 #clock-cells = <0>;
85 clock-output-names = "osc27M";
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
98 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
105 compatible = "syscon", "simple-mfd";
107 reg-io-width = <4>;
108 #address-cells = <1>;
109 #size-cells = <1>;
113 iso: syscon@7000 { label
114 compatible = "syscon", "simple-mfd";
116 reg-io-width = <4>;
117 #address-cells = <1>;
118 #size-cells = <1>;
123 compatible = "syscon", "simple-mfd";
125 reg-io-width = <4>;
126 #address-cells = <1>;
127 #size-cells = <1>;
132 compatible = "syscon", "simple-mfd";
134 reg-io-width = <4>;
135 #address-cells = <1>;
136 #size-cells = <1>;
141 compatible = "syscon", "simple-mfd";
143 reg-io-width = <4>;
144 #address-cells = <1>;
145 #size-cells = <1>;
150 gic: interrupt-controller@ff011000 {
151 compatible = "arm,cortex-a7-gic";
157 interrupt-controller;
158 #interrupt-cells = <3>;
164 reset1: reset-controller@0 {
165 compatible = "snps,dw-low-reset";
167 #reset-cells = <1>;
170 reset2: reset-controller@4 {
171 compatible = "snps,dw-low-reset";
173 #reset-cells = <1>;
176 reset3: reset-controller@8 {
177 compatible = "snps,dw-low-reset";
178 reg = <0x8 0x4>;
179 #reset-cells = <1>;
183 &iso {
184 iso_reset: reset-controller@88 {
185 compatible = "snps,dw-low-reset";
187 #reset-cells = <1>;
191 compatible = "realtek,rtd1295-watchdog";
197 compatible = "snps,dw-apb-uart";
199 reg-shift = <2>;
200 reg-io-width = <4>;
202 clock-frequency = <27000000>;
209 compatible = "snps,dw-apb-uart";
211 reg-shift = <2>;
212 reg-io-width = <4>;
214 clock-frequency = <27000000>;