Lines Matching +full:0 +full:x0c40a000
20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>;
25 reg = <0 0>;
31 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
108 reg = <0x8fc00000 0x80000>;
113 reg = <0x8fc80000 0x40000>;
118 reg = <0x8fcfd000 0x1000>;
123 reg = <0x8fd00000 0x100000>;
128 reg = <0x8fe00000 0x20000>;
133 reg = <0x8fe20000 0x20000>;
139 reg = <0x8fe40000 0xc0000>;
144 reg = <0x8ff00000 0x100000>;
149 reg = <0x90000000 0x500000>;
164 qcom,local-pid = <0>;
198 reg = <0x100000 0x1f0000>;
208 reg = <0x00831000 0x200>;
219 reg = <0x00ff4000 0x114>;
221 #phy-cells = <0>;
231 reg = <0x00ff6000 0x1000>;
242 #clock-cells = <0>;
243 #phy-cells = <0>;
255 reg = <0x01100000 0x400000>;
262 reg = <0x09680000 0x40000>;
269 reg = <0x0162c000 0x31200>;
276 reg = <0x01b04000 0x1c000>;
281 qcom,ee = <0>;
288 reg = <0x01b30000 0x10000>;
290 #size-cells = <0>;
295 dmas = <&qpic_bam 0>,
304 reg = <0x01c00000 0x3000>,
305 <0x40000000 0xf1d>,
306 <0x40000f20 0xc8>,
307 <0x40001000 0x1000>,
308 <0x40100000 0x100000>;
315 linux,pci-domain = <0>;
316 bus-range = <0x00 0xff>;
322 ranges = <0x01000000 0x0 0x00000000 0x40200000 0x0 0x100000>,
323 <0x02000000 0x0 0x40300000 0x40300000 0x0 0x3fd00000>;
342 interrupt-map-mask = <0 0 0 0x7>;
343 interrupt-map = <0 0 0 1 &intc 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
344 <0 0 0 2 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
345 <0 0 0 3 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
346 <0 0 0 4 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
366 iommu-map = <0x0 &apps_smmu 0x0200 0x1>,
367 <0x100 &apps_smmu 0x0201 0x1>,
368 <0x200 &apps_smmu 0x0202 0x1>,
369 <0x300 &apps_smmu 0x0203 0x1>,
370 <0x400 &apps_smmu 0x0204 0x1>;
385 reg = <0x01c00000 0x3000>,
386 <0x40000000 0xf1d>,
387 <0x40000f20 0xc8>,
388 <0x40001000 0x1000>,
389 <0x40200000 0x100000>,
390 <0x01c03000 0x3000>;
398 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
436 reg = <0x01c06000 0x2000>;
452 #clock-cells = <0>;
454 #phy-cells = <0>;
468 iommus = <&apps_smmu 0x5e0 0x0>,
469 <&apps_smmu 0x5e2 0x0>;
470 reg = <0x1e40000 0x7000>,
471 <0x1e50000 0x4b20>,
472 <0x1e04000 0x2c000>;
479 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
496 qcom,smem-states = <&ipa_smp2p_out 0>,
506 reg = <0x01f40000 0x40000>;
512 reg = <0x01fc0000 0x1000>;
517 reg = <0x08804000 0x1000>;
529 reg = <0x04080000 0x4040>;
532 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
547 qcom,smem-states = <&modem_smp2p_out 0>;
562 reg = <0x0a6f8800 0x400>;
596 reg = <0x0a600000 0xcd00>;
598 iommus = <&apps_smmu 0x1a0 0x0>;
608 reg = <0x0b210000 0x30000>;
609 qcom,pdc-ranges = <0 179 52>;
617 reg = <0x0c264000 0x1000>;
622 reg = <0x0c440000 0x0000d00>,
623 <0x0c600000 0x2000000>,
624 <0x0e600000 0x0100000>,
625 <0x0e700000 0x00a0000>,
626 <0x0c40a000 0x0000700>;
630 qcom,ee = <0>;
631 qcom,channel = <0>;
633 #size-cells = <0>;
640 reg = <0xf100000 0x300000>;
646 gpio-ranges = <&tlmm 0 0 108>;
651 reg = <0x1468f000 0x1000>;
656 ranges = <0x0 0x1468f000 0x1000>;
660 reg = <0x94c 0x200>;
666 reg = <0x15000000 0x20000>;
693 reg = <0x17800000 0x1000>,
694 <0x17802000 0x1000>;
699 reg = <0x17808000 0x1000>;
702 #clock-cells = <0>;
707 reg = <0x17810000 0x2000>;
711 #clock-cells = <0>;
716 reg = <0x17817000 0x1000>;
725 reg = <0x17820000 0x1000>;
729 frame-number = <0>;
730 interrupts = <GIC_SPI 7 0x4>,
731 <GIC_SPI 6 0x4>;
732 reg = <0x17821000 0x1000>,
733 <0x17822000 0x1000>;
738 interrupts = <GIC_SPI 8 0x4>;
739 reg = <0x17823000 0x1000>;
745 interrupts = <GIC_SPI 9 0x4>;
746 reg = <0x17824000 0x1000>;
752 interrupts = <GIC_SPI 10 0x4>;
753 reg = <0x17825000 0x1000>;
759 interrupts = <GIC_SPI 11 0x4>;
760 reg = <0x17826000 0x1000>;
766 interrupts = <GIC_SPI 12 0x4>;
767 reg = <0x17827000 0x1000>;
773 interrupts = <GIC_SPI 13 0x4>;
774 reg = <0x17828000 0x1000>;
780 interrupts = <GIC_SPI 14 0x4>;
781 reg = <0x17829000 0x1000>;
788 reg = <0x17830000 0x10000>, <0x17840000 0x10000>;
789 reg-names = "drv-0", "drv-1";
792 qcom,tcs-offset = <0xd00>;