Lines Matching +full:0 +full:x02011000
27 #size-cells = <0>;
29 cpu0: cpu@0 {
31 reg = <0>;
45 #clock-cells = <0>;
66 reg = <0x02040000 0x1000>;
67 arm,data-latency = <2 2 0>;
76 reg = <0x02000000 0x1000>,
77 <0x02002000 0x1000>;
86 reg = <0x0200a000 0x100>;
88 cpu-offset = <0x80000>;
94 gpio-ranges = <&msmgpio 0 0 88>;
99 reg = <0x800000 0x4000>;
107 reg = <0x900000 0x4000>;
114 reg = <0x28000000 0x1000>;
119 <0>,
120 <0>, <0>,
121 <0>, <0>,
122 <0>;
135 reg = <0x02011000 0x1000>;
140 reg = <0x1a500000 0x200>;
150 reg = <0x16100000 0x100>;
161 #size-cells = <0>;
162 reg = <0x16180000 0x1000>;
174 reg = <0x16200000 0x100>;
185 #size-cells = <0>;
186 reg = <0x16280000 0x1000>;
198 reg = <0x16300000 0x100>;
210 reg = <0x16340000 0x1000>,
211 <0x16300000 0x1000>;
222 reg = <0x16400000 0x100>;
235 #size-cells = <0>;
236 reg = <0x16480000 0x1000>;
250 reg = <0x16440000 0x1000>,
251 <0x16400000 0x1000>;
261 reg = <0x500000 0x1000>;
267 reg = <0x12182000 0x8000>;
272 qcom,ee = <0>;
277 reg = <0x12142000 0x8000>;
282 qcom,ee = <0>;
288 arm,primecell-periphid = <0x00051180>;
289 reg = <0x12180000 0x2000>;
306 arm,primecell-periphid = <0x00051180>;
308 reg = <0x12140000 0x2000>;
326 reg = <0x1a400000 0x100>;
331 reg = <0x108000 0x1000>;
333 qcom,ipc = <&l2cc 0x8 2>;