Lines Matching +full:1 +full:a200000
15 #address-cells = <1>;
16 #size-cells = <1>;
22 #address-cells = <1>;
35 cpu1: cpu@1 {
39 reg = <1>;
76 thermal-sensors = <&tsens 1>;
286 #address-cells = <1>;
287 #size-cells = <1>;
345 #address-cells = <1>;
346 #size-cells = <1>;
365 #clock-cells = <1>;
378 #address-cells = <1>;
379 #size-cells = <1>;
504 #clock-cells = <1>;
505 #reset-cells = <1>;
516 #thermal-sensor-cells = <1>;
524 #hwlock-cells = <1>;
538 interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) |
598 #address-cells = <1>;
599 #size-cells = <1>;
643 #address-cells = <1>;
644 #size-cells = <1>;
692 #dma-cells = <1>;
702 #dma-cells = <1>;
708 #address-cells = <1>;
709 #size-cells = <1>;
727 dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
745 dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
753 cell-index = <1>;
756 #address-cells = <1>;
757 #size-cells = <1>;
781 #address-cells = <1>;
794 #address-cells = <1>;
795 #size-cells = <1>;
820 #address-cells = <1>;
831 #address-cells = <1>;
832 #size-cells = <1>;
857 #address-cells = <1>;
868 #address-cells = <1>;
869 #size-cells = <1>;
884 #address-cells = <1>;
898 #address-cells = <1>;
912 #address-cells = <1>;
913 #size-cells = <1>;
935 #address-cells = <1>;
946 #dma-cells = <1>;
962 gsbi5: gsbi@1a200000 {
968 #address-cells = <1>;
970 #size-cells = <1>;
976 gsbi5_serial: serial@1a240000 {
986 i2c@1a280000 {
995 #address-cells = <1>;
999 spi@1a280000 {
1008 #address-cells = <1>;
1013 tcsr: syscon@1a400000 {
1018 rng@1a500000 {
1025 nand: nand-controller@1ac00000 {
1041 #address-cells = <1>;
1047 sata_phy: sata-phy@1b400000 {
1058 pcie0: pcie@1b500000 {
1068 num-lanes = <1>;
1077 #interrupt-cells = <1>;
1079 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1119 pcie1: pcie@1b700000 {
1127 linux,pci-domain = <1>;
1129 num-lanes = <1>;
1138 #interrupt-cells = <1>;
1140 interrupt-map = <0 0 0 1 &intc 0 58 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1180 pcie2: pcie@1b900000 {
1190 num-lanes = <1>;
1199 #interrupt-cells = <1>;
1201 interrupt-map = <0 0 0 1 &intc 0 72 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1241 qsgmii_csr: syscon@1bb00000 {
1249 #clock-cells = <1>;
1250 #reset-cells = <1>;