Lines Matching +full:0 +full:x8006a000
43 #size-cells = <0>;
45 cpu@0 {
48 reg = <0>;
56 reg = <0x80000000 0x80000>;
63 reg = <0x80000000 0x3c900>;
70 reg = <0x80000000 0x2000>;
74 reg = <0x80002000 0x2000>;
83 reg = <0x80004000 0x2000>;
87 <87>, <86>, <0>, <0>;
94 reg = <0x80006000 0x800>;
103 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
118 #size-cells = <0>;
119 reg = <0x80010000 0x2000>;
122 dmas = <&dma_apbh 0>;
129 #size-cells = <0>;
130 reg = <0x80012000 0x2000>;
140 #size-cells = <0>;
141 reg = <0x80014000 0x2000>;
151 #size-cells = <0>;
152 reg = <0x80016000 0x2000>;
162 #size-cells = <0>;
164 reg = <0x80018000 0x2000>;
166 gpio0: gpio@0 {
168 reg = <0>;
216 duart_pins_a: duart@0 {
217 reg = <0>;
238 duart_4pins_a: duart-4pins@0 {
239 reg = <0>;
251 gpmi_pins_a: gpmi-nand@0 {
252 reg = <0>;
275 gpmi_status_cfg: gpmi-status-cfg@0 {
276 reg = <0>;
285 auart0_pins_a: auart0@0 {
286 reg = <0>;
298 auart0_2pins_a: auart0-2pins@0 {
299 reg = <0>;
309 auart1_pins_a: auart1@0 {
310 reg = <0>;
322 auart1_2pins_a: auart1-2pins@0 {
323 reg = <0>;
333 auart2_2pins_a: auart2-2pins@0 {
334 reg = <0>;
355 auart2_pins_a: auart2-pins@0 {
356 reg = <0>;
368 auart3_pins_a: auart3@0 {
369 reg = <0>;
381 auart3_2pins_a: auart3-2pins@0 {
382 reg = <0>;
403 auart4_2pins_a: auart4@0 {
404 reg = <0>;
425 mac0_pins_a: mac0@0 {
426 reg = <0>;
469 mac1_pins_a: mac1@0 {
470 reg = <0>;
484 mmc0_8bit_pins_a: mmc0-8bit@0 {
485 reg = <0>;
504 mmc0_4bit_pins_a: mmc0-4bit@0 {
505 reg = <0>;
520 mmc0_cd_cfg: mmc0-cd-cfg@0 {
521 reg = <0>;
528 mmc0_sck_cfg: mmc0-sck-cfg@0 {
529 reg = <0>;
537 mmc1_4bit_pins_a: mmc1-4bit@0 {
538 reg = <0>;
553 mmc1_cd_cfg: mmc1-cd-cfg@0 {
554 reg = <0>;
561 mmc1_sck_cfg: mmc1-sck-cfg@0 {
562 reg = <0>;
571 mmc2_4bit_pins_a: mmc2-4bit@0 {
572 reg = <0>;
603 mmc2_cd_cfg: mmc2-cd-cfg@0 {
604 reg = <0>;
611 mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
612 reg = <0>;
629 i2c0_pins_a: i2c0@0 {
630 reg = <0>;
651 i2c1_pins_a: i2c1@0 {
652 reg = <0>;
673 saif0_pins_a: saif0@0 {
674 reg = <0>;
698 saif1_pins_a: saif1@0 {
699 reg = <0>;
708 pwm0_pins_a: pwm0@0 {
709 reg = <0>;
718 pwm2_pins_a: pwm2@0 {
719 reg = <0>;
728 pwm3_pins_a: pwm3@0 {
729 reg = <0>;
748 pwm4_pins_a: pwm4@0 {
749 reg = <0>;
758 lcdif_24bit_pins_a: lcdif-24bit@0 {
759 reg = <0>;
791 lcdif_18bit_pins_a: lcdif-18bit@0 {
792 reg = <0>;
818 lcdif_16bit_pins_a: lcdif-16bit@0 {
819 reg = <0>;
843 lcdif_sync_pins_a: lcdif-sync@0 {
844 reg = <0>;
856 can0_pins_a: can0@0 {
857 reg = <0>;
867 can1_pins_a: can1@0 {
868 reg = <0>;
878 spi2_pins_a: spi2@0 {
879 reg = <0>;
891 spi3_pins_a: spi3@0 {
892 reg = <0>;
919 usb0_pins_a: usb0@0 {
920 reg = <0>;
939 usb1_pins_a: usb1@0 {
940 reg = <0>;
959 usb0_id_pins_a: usb0id@0 {
960 reg = <0>;
969 usb0_id_pins_b: usb0id1@0 {
970 reg = <0>;
983 reg = <0x8001c000 0x2000>;
989 reg = <0x80022000 0x2000>;
995 reg = <0x80024000 0x2000>;
996 interrupts = <78>, <79>, <66>, <0>,
1007 reg = <0x80028000 0x2000>;
1013 reg = <0x8002a000 0x2000>;
1022 reg = <0x8002c000 0x2000>;
1027 reg = <0x8002e000 0x2000>;
1033 reg = <0x80030000 0x2000>;
1043 reg = <0x80032000 0x2000>;
1052 reg = <0x80034000 0x2000>;
1060 reg = <0x8003c000 0x200>;
1065 reg = <0x8003c200 0x100>;
1070 reg = <0x8003c300 0x100>;
1075 reg = <0x8003c400 0x100>;
1080 reg = <0x8003c500 0x100>;
1085 reg = <0x8003c700 0x100>;
1090 reg = <0x8003c800 0x100>;
1099 reg = <0x80040000 0x40000>;
1104 reg = <0x80040000 0x2000>;
1109 #sound-dai-cells = <0>;
1111 reg = <0x80042000 0x2000>;
1113 #clock-cells = <0>;
1121 reg = <0x80044000 0x2000>;
1126 #sound-dai-cells = <0>;
1128 reg = <0x80046000 0x2000>;
1138 reg = <0x80050000 0x2000>;
1147 reg = <0x80054000 0x2000>;
1156 reg = <0x80056000 0x2000>;
1162 #size-cells = <0>;
1164 reg = <0x80058000 0x2000>;
1174 #size-cells = <0>;
1176 reg = <0x8005a000 0x2000>;
1186 reg = <0x80064000 0x2000>;
1195 reg = <0x80068000 0x2000>;
1202 reg = <0x8006a000 0x2000>;
1212 reg = <0x8006c000 0x2000>;
1222 reg = <0x8006e000 0x2000>;
1232 reg = <0x80070000 0x2000>;
1242 reg = <0x80072000 0x2000>;
1244 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1252 reg = <0x80074000 0x1000>;
1261 reg = <0x8007c000 0x2000>;
1268 reg = <0x8007e000 0x2000>;
1279 reg = <0x80080000 0x80000>;
1284 reg = <0x80080000 0x10000>;
1293 reg = <0x80090000 0x10000>;
1302 reg = <0x800c0000 0x10000>;
1308 reg = <0x800f0000 0x4000>;
1317 reg = <0x800f4000 0x4000>;
1325 reg = <0x800f8000 0x8000>;