Lines Matching +full:0 +full:x400e8000
19 #clock-cells = <0>;
25 #clock-cells = <0>;
33 reg = <0x40184000 0x4000>;
42 reg = <0x401f8000 0x4000>;
43 fsl,mux_mask = <0x7>;
48 reg = <0x400d8000 0x4000>;
53 reg = <0x400fc000 0x4000>;
75 reg = <0x400e8000 0x4000>,
76 <0x400ec000 0x4000>;
78 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, <8>,
87 reg = <0x402c0000 0x4000>;
104 reg = <0x401b8000 0x4000>;
114 reg = <0x401bc000 0x4000>;
124 reg = <0x401c0000 0x4000>;
134 reg = <0x401c4000 0x4000>;
144 reg = <0x400c0000 0x4000>;
154 reg = <0x401ec000 0x4000>;