Lines Matching +full:0 +full:x5a
25 gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
35 button-0 {
201 pinctrl-0 = <&pinctrl_ecspi1>;
202 cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
209 pinctrl-0 = <&pinctrl_ecspi2>;
215 pinctrl-0 = <&pinctrl_enet1>;
226 #size-cells = <0>;
228 ethphy1_0: ethernet-phy@0 {
230 reg = <0>;
245 uboot@0 {
247 reg = <0x0 0xd0000>;
252 reg = <0xd0000 0x10000>;
257 reg = <0xe0000 0x10000>;
262 reg = <0xf0000 0x10000>;
267 reg = <0x100000 0x700000>;
272 reg = <0x800000 0x3800000>;
279 pinctrl-0 = <&pinctrl_flexcan1>;
285 pinctrl-0 = <&pinctrl_flexcan2>;
292 reg = <0x49>;
299 pinctrl-0 = <&pinctrl_i2c2>;
304 reg = <0x18>;
313 reg = <0x20>;
315 pinctrl-0 = <&pinctrl_pca9555>;
328 pinctrl-0 = <&pinctrl_i2c3>;
334 pinctrl-0 = <&pinctrl_hog_mba7_1>;
338 MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x7c
339 MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x74
340 MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x74
341 MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 0x74
342 MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x74
343 MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 0x74
349 MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c
350 MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74
351 MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74
352 MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 0x74
358 MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x02
359 MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00
360 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x71
361 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71
362 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71
363 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x71
364 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x71
365 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71
366 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x79
367 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79
368 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79
369 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x79
370 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x79
371 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79
373 MX7D_PAD_ENET1_COL__GPIO7_IO15 0x40000070
375 MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078
381 MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a
382 MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52
388 MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x5a
389 MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x52
396 MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 0x4000007c
397 MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x40000074
399 MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x40000010
405 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000078
406 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000078
412 MX7D_PAD_I2C3_SCL__I2C3_SCL 0x40000078
413 MX7D_PAD_I2C3_SDA__I2C3_SDA 0x40000078
419 MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78
425 MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11
426 MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c
427 MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c
428 MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c
430 MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c
431 MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14
432 MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14
438 MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e
439 MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76
440 MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76
441 MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e
447 MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e
448 MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76
449 MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS 0x76
450 MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS 0x7e
456 MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x7e
457 MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x76
463 MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x7d
464 MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x75
465 MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x75
466 MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x7d
472 MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x7e
473 MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x76
474 MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS 0x76
476 MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS 0x7e
483 MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c
485 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x7c
487 MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59
493 MX7D_PAD_SD1_CMD__SD1_CMD 0x5e
494 MX7D_PAD_SD1_CLK__SD1_CLK 0x57
495 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5e
496 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5e
497 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5e
498 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5e
504 MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
505 MX7D_PAD_SD1_CLK__SD1_CLK 0x57
506 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
507 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
508 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
509 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
515 MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
516 MX7D_PAD_SD1_CLK__SD1_CLK 0x57
517 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
518 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
519 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
520 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
529 MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x50
535 MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x5c
536 MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59
542 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30
549 pinctrl-0 = <&pinctrl_pwm1>;
555 pinctrl-0 = <&pinctrl_sai1>;
559 assigned-clock-rates = <0>, <36864000>;
565 pinctrl-0 = <&pinctrl_uart3>;
573 pinctrl-0 = <&pinctrl_uart4>;
581 pinctrl-0 = <&pinctrl_uart5>;
589 pinctrl-0 = <&pinctrl_uart6>;
597 pinctrl-0 = <&pinctrl_uart7>;
613 pinctrl-0 = <&pinctrl_usbotg1>;
625 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
628 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
638 pinctrl-0 = <&pinctrl_wdog1>;