Lines Matching +full:0 +full:x40010000
21 reg = <0x10000000 0x20000000>;
26 reg = <0x80000000 0x20000000>;
31 #clock-cells = <0>;
37 #clock-cells = <0>;
43 #clock-cells = <0>;
49 #clock-cells = <0>;
56 pinctrl-0 = <&pinctrl_mdio>;
59 #size-cells = <0>;
65 reg = <0x3>;
73 micrel,led-mode = <0>;
77 reg = <0x4>;
84 #size-cells = <0>;
87 reg = <0x5>;
113 pinctrl-0 = <&pinctrl_wifi_npd>;
120 pinctrl-0 = <&pinctrl_can1>;
128 pinctrl-0 = <&pinctrl_ecspi2>;
131 switch@0 {
133 reg = <0>;
145 #size-cells = <0>;
147 port@0 {
148 reg = <0>;
196 pinctrl-0 = <&pinctrl_ecspi3>;
199 can@0 {
202 pinctrl-0 = <&pinctrl_can2>;
203 reg = <0>;
212 pinctrl-0 = <&pinctrl_enet>;
226 #size-cells = <0>;
299 pinctrl-0 = <&pinctrl_i2c1>;
308 reg = <0x49>;
310 #size-cells = <0>;
343 pinctrl-0 = <&pinctrl_uart4>;
350 pinctrl-0 = <&pinctrl_usbotg>;
367 pinctrl-0 = <&pinctrl_usdhc1>;
379 pinctrl-0 = <&pinctrl_usdhc2>;
385 #size-cells = <0>;
395 pinctrl-0 = <&pinctrl_usdhc3>;
407 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
408 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
410 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
417 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b1
419 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13070
425 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
426 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
427 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
428 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
434 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
435 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
436 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
438 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1
444 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
445 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
446 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
447 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
448 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
449 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
450 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
451 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
452 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
453 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
454 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
455 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
457 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
458 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
461 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0
463 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030
466 MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x10030
469 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x10030
471 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x40010000
477 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
478 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
485 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x10030
487 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
490 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x10030
492 MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x100b1
494 MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1f030
500 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
501 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
507 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
508 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
514 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
515 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
516 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
517 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
518 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
519 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
520 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
526 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
527 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
528 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
529 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
530 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
531 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
537 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
538 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
539 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
540 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
541 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
542 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
543 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
544 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
545 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
546 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
547 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
554 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069