Lines Matching +full:0 +full:x130b0
31 #sound-dai-cells = <0>;
87 pinctrl-0 = <&pinctrl_usbotgvbus>;
94 pinctrl-0 = <&pinctrl_audmux>;
106 pinctrl-0 = <&pinctrl_i2c1>;
116 pinctrl-0 = <&pinctrl_i2c2>;
124 pinctrl-0 = <&pinctrl_mclk>;
126 reg = <0x0a>;
127 #sound-dai-cells = <0>;
137 pinctrl-0 = <&pinctrl_ov5645>;
138 reg = <0x3c>;
150 clock-lanes = <0>;
164 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
165 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
166 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
167 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
173 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
174 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
175 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
176 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
177 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
178 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
179 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
180 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
181 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
182 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
183 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
184 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
185 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
186 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
187 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
188 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
194 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
195 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
201 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b0
202 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b0
208 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
209 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
215 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b0
216 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b0
222 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
228 MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
229 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
230 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
236 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
242 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
243 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
249 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
250 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
251 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
252 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
258 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
264 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
270 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
271 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
272 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
273 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
274 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
275 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
281 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
282 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
283 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
284 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
285 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
286 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
292 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
293 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
294 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
295 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
296 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
297 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
305 pinctrl-0 = <&pinctrl_enet>;
313 #size-cells = <0>;
325 port@0 {
326 reg = <0>;
330 clock-lanes = <0>;
338 pinctrl-0 = <&pinctrl_spdif>;
348 pinctrl-0 = <&pinctrl_uart1>;
354 pinctrl-0 = <&pinctrl_uart3>;
366 pinctrl-0 = <&pinctrl_usbotg>;
374 pinctrl-0 = <&pinctrl_usdhc1>;
381 pinctrl-0 = <&pinctrl_usdhc3>;