Lines Matching +full:0 +full:x1b0b1
73 pwms = <&pwm4 0 5000000 0>;
74 brightness-levels = <0 4 8 16 32 64 128 255>;
83 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
91 interrupts = <0>;
126 pinctrl-0 = <&pinctrl_gpio_leds>;
150 reg = <0x10000000 0x40000000>;
156 pinctrl-0 = <&pinctrl_pps>;
203 pinctrl-0 = <&pinctrl_enet>;
214 #size-cells = <0>;
216 switch@0 {
218 reg = <0>;
222 #size-cells = <0>;
224 sw_phy0: ethernet-phy@0 {
225 reg = <0x0>;
229 reg = <0x1>;
233 reg = <0x2>;
237 reg = <0x3>;
243 #size-cells = <0>;
245 lan4: port@0 {
246 reg = <0>;
295 pinctrl-0 = <&pinctrl_i2c1>;
300 reg = <0x20>;
305 #size-cells = <0>;
310 #size-cells = <0>;
312 channel@0 {
313 gw,mode = <0>;
314 reg = <0x00>;
320 reg = <0x02>;
326 reg = <0x05>;
332 reg = <0x08>;
338 reg = <0x0b>;
344 reg = <0xe>;
350 reg = <0x11>;
356 reg = <0x14>;
362 reg = <0x17>;
368 reg = <0x1d>;
374 reg = <0x20>;
380 reg = <0x23>;
388 reg = <0x23>;
397 reg = <0x50>;
403 reg = <0x51>;
409 reg = <0x52>;
415 reg = <0x53>;
421 reg = <0x68>;
428 pinctrl-0 = <&pinctrl_i2c2>;
433 reg = <0x1c>;
435 pinctrl-0 = <&pinctrl_mag>;
442 reg = <0x3c>;
515 reg = <0x60>;
520 reg = <0x6a>;
523 pinctrl-0 = <&pinctrl_imu>;
532 pinctrl-0 = <&pinctrl_i2c3>;
537 reg = <0x04>;
547 lvds-channel@0 {
571 pinctrl-0 = <&pinctrl_pcie>;
572 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
578 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
584 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
590 pinctrl-0 = <&pinctrl_pwm4>;
596 pinctrl-0 = <&pinctrl_uart1>;
602 pinctrl-0 = <&pinctrl_uart2>;
608 pinctrl-0 = <&pinctrl_uart3>;
615 pinctrl-0 = <&pinctrl_uart4>;
622 pinctrl-0 = <&pinctrl_uart5>;
629 pinctrl-0 = <&pinctrl_usbotg>;
641 pinctrl-0 = <&pinctrl_usdhc3>;
652 pinctrl-0 = <&pinctrl_wdog>;
659 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
660 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
661 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
662 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
663 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
664 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
665 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
666 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
667 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
668 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
669 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
670 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
671 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
672 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
673 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
674 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
675 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
681 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
682 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
683 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
689 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
690 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
691 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
697 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
698 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
704 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
705 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
711 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
717 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
723 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
729 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */
735 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
741 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
747 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
753 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
759 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
760 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
766 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
767 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
773 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
774 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
775 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
776 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
782 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
783 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
784 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
785 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
791 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
792 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
798 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
799 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
800 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
806 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
807 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
808 MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
809 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
810 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
811 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
812 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
813 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
814 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
815 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
816 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
822 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
823 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
824 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
825 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
826 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
827 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
828 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
829 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
830 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
831 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
832 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
838 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
839 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
840 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
841 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
842 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
843 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
844 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
845 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
846 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
847 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
848 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
854 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0