Lines Matching +full:1 +full:khz
16 #address-cells = <1>;
25 /* kHz uV */
33 /* ARM kHz SOC-PU uV */
56 cpu1: cpu@1 {
59 reg = <1>;
62 /* kHz uV */
70 /* ARM kHz SOC-PU uV */
97 /* kHz uV */
105 /* ARM kHz SOC-PU uV */
132 /* kHz uV */
140 /* ARM kHz SOC-PU uV */
167 #address-cells = <1>;
168 #size-cells = <1>;
175 #address-cells = <1>;
183 dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
213 #address-cells = <1>;
233 ipu2_csi1: port@1 {
234 reg = <1>;
242 #address-cells = <1>;
250 ipu2_di0_hdmi: endpoint@1 {
251 reg = <1>;
272 #address-cells = <1>;
276 ipu2_di1_hdmi: endpoint@1 {
277 reg = <1>;
311 gpio-ranges = <&iomuxc 0 136 2>, <&iomuxc 2 141 1>, <&iomuxc 3 139 1>,
312 <&iomuxc 4 142 2>, <&iomuxc 6 140 1>, <&iomuxc 7 144 2>,
313 <&iomuxc 9 138 1>, <&iomuxc 10 213 3>, <&iomuxc 13 20 1>,
314 <&iomuxc 14 19 1>, <&iomuxc 15 21 1>, <&iomuxc 16 208 1>,
315 <&iomuxc 17 207 1>, <&iomuxc 18 210 3>, <&iomuxc 21 209 1>,
320 gpio-ranges = <&iomuxc 0 191 16>, <&iomuxc 16 55 14>, <&iomuxc 30 35 1>,
321 <&iomuxc 31 44 1>;
329 gpio-ranges = <&iomuxc 5 149 1>, <&iomuxc 6 126 10>, <&iomuxc 16 87 16>;
333 gpio-ranges = <&iomuxc 0 85 1>, <&iomuxc 2 34 1>, <&iomuxc 4 53 1>,
338 gpio-ranges = <&iomuxc 0 164 6>, <&iomuxc 6 54 1>, <&iomuxc 7 181 5>,
340 <&iomuxc 31 86 1>;
351 #address-cells = <1>;
362 port@1 {
363 reg = <1>;
380 mux-controls = <&mux 1>;
381 #address-cells = <1>;
392 port@1 {
393 reg = <1>;
468 lvds-channel@1 {
488 port@1 {
489 reg = <1>;