Lines Matching +full:0 +full:xf4000000
17 reg = <0x70000000 0x40000000>;
24 reg = <0xf4000000 0x3ff0000>;
29 reg = <0xf4000000 0x2000000>;
32 interrupts = <31 0x8>;
59 gpios = <&gpio5 10 0>;
66 gpios = <&gpio5 11 0>;
73 gpios = <&gpio5 12 0>;
80 gpios = <&gpio5 13 0>;
86 gpios = <&gpio4 0 0>;
94 pinctrl-0 = <&pinctrl_esdhc1>;
102 pinctrl-0 = <&pinctrl_hog>;
107 MX53_PAD_GPIO_1__GPIO1_1 0x80000000
108 MX53_PAD_GPIO_9__GPIO1_9 0x80000000
109 MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
110 MX53_PAD_GPIO_10__GPIO4_0 0x80000000
111 MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000
112 MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000
113 MX53_PAD_DISP0_DAT18__GPIO5_12 0x80000000
114 MX53_PAD_DISP0_DAT19__GPIO5_13 0x80000000
115 MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x80000000
116 MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x80000000
117 MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x80000000
118 MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x80000000
119 MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x80000000
120 MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x80000000
121 MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x80000000
122 MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x80000000
123 MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x80000000
124 MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x80000000
125 MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x80000000
126 MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x80000000
127 MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x80000000
128 MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x80000000
129 MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x80000000
130 MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x80000000
131 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
132 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
133 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
134 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
135 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
136 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
137 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
138 MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000
139 MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000
140 MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000
146 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
147 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
148 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
149 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
150 MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x1d5
151 MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x1d5
152 MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x1d5
153 MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x1d5
154 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
155 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
161 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
162 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
170 pinctrl-0 = <&pinctrl_uart1>;