Lines Matching +full:- +full:function
1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,arm926ej-s";
33 clk24m: clock-24mhz {
35 compatible = "fixed-clock";
36 clock-frequency = <24000000>;
37 #clock-cells = <0>;
40 refclk: clock-48mhz {
42 compatible = "fixed-clock";
43 clock-output-names = "ref";
44 clock-frequency = <48000000>;
45 #clock-cells = <0>;
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&aic>;
56 compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
60 clk: clock-controller@b0000200 {
61 compatible = "nuvoton,wpcm450-clk";
64 clock-names = "ref";
65 #clock-cells = <1>;
66 #reset-cells = <1>;
70 compatible = "nuvoton,wpcm450-uart";
72 reg-shift = <2>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&bsp_pins>;
81 compatible = "nuvoton,wpcm450-uart";
83 reg-shift = <2>;
90 compatible = "nuvoton,wpcm450-timer";
97 compatible = "nuvoton,wpcm450-wdt";
103 aic: interrupt-controller@b8002000 {
104 compatible = "nuvoton,wpcm450-aic";
106 interrupt-controller;
107 #interrupt-cells = <2>;
111 compatible = "nuvoton,wpcm450-pinctrl";
113 #address-cells = <1>;
114 #size-cells = <0>;
118 gpio-controller;
119 #gpio-cells = <2>;
123 #interrupt-cells = <2>;
124 interrupt-controller;
129 gpio-controller;
130 #gpio-cells = <2>;
132 #interrupt-cells = <2>;
133 interrupt-controller;
138 gpio-controller;
139 #gpio-cells = <2>;
144 gpio-controller;
145 #gpio-cells = <2>;
150 gpio-controller;
151 #gpio-cells = <2>;
156 gpio-controller;
157 #gpio-cells = <2>;
162 gpio-controller;
163 #gpio-cells = <2>;
168 gpio-controller;
169 #gpio-cells = <2>;
172 smb3_pins: mux-smb3 {
174 function = "smb3";
177 smb4_pins: mux-smb4 {
179 function = "smb4";
182 smb5_pins: mux-smb5 {
184 function = "smb5";
187 scs1_pins: mux-scs1 {
189 function = "scs1";
192 scs2_pins: mux-scs2 {
194 function = "scs2";
197 scs3_pins: mux-scs3 {
199 function = "scs3";
202 smb0_pins: mux-smb0 {
204 function = "smb0";
207 smb1_pins: mux-smb1 {
209 function = "smb1";
212 smb2_pins: mux-smb2 {
214 function = "smb2";
217 bsp_pins: mux-bsp {
219 function = "bsp";
222 hsp1_pins: mux-hsp1 {
224 function = "hsp1";
227 hsp2_pins: mux-hsp2 {
229 function = "hsp2";
232 r1err_pins: mux-r1err {
234 function = "r1err";
237 r1md_pins: mux-r1md {
239 function = "r1md";
242 rmii2_pins: mux-rmii2 {
244 function = "rmii2";
247 r2err_pins: mux-r2err {
249 function = "r2err";
252 r2md_pins: mux-r2md {
254 function = "r2md";
257 kbcc_pins: mux-kbcc {
259 function = "kbcc";
262 dvo0_pins: mux-dvo0 {
264 function = "dvo0";
267 dvo3_pins: mux-dvo3 {
269 function = "dvo3";
272 clko_pins: mux-clko {
274 function = "clko";
277 smi_pins: mux-smi {
279 function = "smi";
282 uinc_pins: mux-uinc {
284 function = "uinc";
287 gspi_pins: mux-gspi {
289 function = "gspi";
292 mben_pins: mux-mben {
294 function = "mben";
297 xcs2_pins: mux-xcs2 {
299 function = "xcs2";
302 xcs1_pins: mux-xcs1 {
304 function = "xcs1";
307 sdio_pins: mux-sdio {
309 function = "sdio";
312 sspi_pins: mux-sspi {
314 function = "sspi";
317 fi0_pins: mux-fi0 {
319 function = "fi0";
322 fi1_pins: mux-fi1 {
324 function = "fi1";
327 fi2_pins: mux-fi2 {
329 function = "fi2";
332 fi3_pins: mux-fi3 {
334 function = "fi3";
337 fi4_pins: mux-fi4 {
339 function = "fi4";
342 fi5_pins: mux-fi5 {
344 function = "fi5";
347 fi6_pins: mux-fi6 {
349 function = "fi6";
352 fi7_pins: mux-fi7 {
354 function = "fi7";
357 fi8_pins: mux-fi8 {
359 function = "fi8";
362 fi9_pins: mux-fi9 {
364 function = "fi9";
367 fi10_pins: mux-fi10 {
369 function = "fi10";
372 fi11_pins: mux-fi11 {
374 function = "fi11";
377 fi12_pins: mux-fi12 {
379 function = "fi12";
382 fi13_pins: mux-fi13 {
384 function = "fi13";
387 fi14_pins: mux-fi14 {
389 function = "fi14";
392 fi15_pins: mux-fi15 {
394 function = "fi15";
397 pwm0_pins: mux-pwm0 {
399 function = "pwm0";
402 pwm1_pins: mux-pwm1 {
404 function = "pwm1";
407 pwm2_pins: mux-pwm2 {
409 function = "pwm2";
412 pwm3_pins: mux-pwm3 {
414 function = "pwm3";
417 pwm4_pins: mux-pwm4 {
419 function = "pwm4";
422 pwm5_pins: mux-pwm5 {
424 function = "pwm5";
427 pwm6_pins: mux-pwm6 {
429 function = "pwm6";
432 pwm7_pins: mux-pwm7 {
434 function = "pwm7";
437 hg0_pins: mux-hg0 {
439 function = "hg0";
442 hg1_pins: mux-hg1 {
444 function = "hg1";
447 hg2_pins: mux-hg2 {
449 function = "hg2";
452 hg3_pins: mux-hg3 {
454 function = "hg3";
457 hg4_pins: mux-hg4 {
459 function = "hg4";
462 hg5_pins: mux-hg5 {
464 function = "hg5";
467 hg6_pins: mux-hg6 {
469 function = "hg6";
472 hg7_pins: mux-hg7 {
474 function = "hg7";
478 fiu: spi-controller@c8000000 {
479 compatible = "nuvoton,wpcm450-fiu";
480 #address-cells = <1>;
481 #size-cells = <0>;
483 reg-names = "control", "memory";
490 compatible = "nuvoton,wpcm450-shm", "syscon";
492 reg-io-width = <1>;