Lines Matching +full:cooling +full:- +full:levels
1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 #include "nuvoton-npcm750.dtsi"
7 #include "dt-bindings/gpio/gpio.h"
8 #include "nuvoton-npcm750-pincfg-evb.dtsi"
12 compatible = "nuvoton,npcm750-evb", "nuvoton,npcm750";
45 stdout-path = &serial3;
55 phy-mode = "rgmii-id";
60 phy-mode = "rgmii-id";
71 compatible = "jedec,spi-nor";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 spi-rx-bus-width = <2>;
76 spi-max-frequency = <5000000>;
78 compatible = "fixed-partitions";
79 #address-cells = <1>;
80 #size-cells = <1>;
82 label = "bb-uboot-1";
84 read-only;
87 label = "bb-uboot-2";
89 read-only;
92 label = "env-param";
94 read-only;
129 pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
132 compatible = "jedec,spi-nor";
133 #address-cells = <1>;
134 #size-cells = <1>;
135 spi-rx-bus-width = <2>;
137 spi-max-frequency = <5000000>;
139 compatible = "fixed-partitions";
140 #address-cells = <1>;
141 #size-cells = <1>;
143 label = "spi3-system1";
151 spix-mode;
198 clock-frequency = <100000>;
209 clock-frequency = <100000>;
220 clock-frequency = <100000>;
230 clock-frequency = <100000>;
235 clock-frequency = <100000>;
241 clock-frequency = <100000>;
251 clock-frequency = <100000>;
256 clock-frequency = <100000>;
261 clock-frequency = <100000>;
266 clock-frequency = <100000>;
271 clock-frequency = <100000>;
276 clock-frequency = <100000>;
284 fan-tach-ch = /bits/ 8 <0x00 0x01>;
285 cooling-levels = <127 255>;
289 fan-tach-ch = /bits/ 8 <0x02 0x03>;
290 cooling-levels = /bits/ 8 <127 255>;
294 fan-tach-ch = /bits/ 8 <0x04 0x05>;
295 cooling-levels = /bits/ 8 <127 255>;
299 fan-tach-ch = /bits/ 8 <0x06 0x07>;
300 cooling-levels = /bits/ 8 <127 255>;
304 fan-tach-ch = /bits/ 8 <0x08 0x09>;
305 cooling-levels = /bits/ 8 <127 255>;
309 fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
310 cooling-levels = /bits/ 8 <127 255>;
314 fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
315 cooling-levels = /bits/ 8 <127 255>;
319 fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
320 cooling-levels = /bits/ 8 <127 255>;
325 cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
329 "jedec,spi-nor";
331 #address-cells = <1>;
332 #size-cells = <1>;
333 spi-max-frequency = <5000000>;
346 cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
350 "jedec,spi-nor";
352 #address-cells = <1>;
353 #size-cells = <1>;
354 spi-max-frequency = <5000000>;
367 pinctrl-names = "default";
368 pinctrl-0 = < &iox1_pins