Lines Matching +full:0 +full:xe8c00000
31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
88 hysteresis = <0>;
94 hysteresis = <0>;
100 hysteresis = <0>;
122 #clock-cells = <0>;
127 #clock-cells = <0>;
132 #clock-cells = <0>;
151 reg = <0x100000 0x20000>;
157 #thermal-sensor-cells = <0>;
171 reg = <0x00600000 0x2400>;
174 ranges = <0 0x00600000 0x2400>;
179 reg = <0x10000000 0x8000000>;
187 reg = <0x40000000 0x20000000>;
188 ranges = <0x0 0x0 0x40000000 0x8000000
189 0x1 0x0 0x48000000 0x8000000
190 0x2 0x0 0x50000000 0x8000000
191 0x3 0x0 0x58000000 0x8000000>;
209 reg = <0xe0000000 0x4000>;
213 ranges = <0 0xe0000000 0x4000>;
219 reg = <0xe0004000 0x4000>;
226 reg = <0xe0008000 0x20>;
231 reg = <0xe0014000 0x800>;
246 reg = <0xe0018000 0x200>;
249 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
255 reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
257 clocks = <&clk32k 0>;
262 reg = <0xe001d010 0x10>;
263 clocks = <&clk32k 0>;
265 #size-cells = <0>;
273 reg = <0xe001d020 0x30>;
275 clocks = <&clk32k 0>;
280 reg = <0xe001d050 0x4>;
287 reg = <0xe001d060 0x48>;
292 reg = <0xe001d0a8 0x30>;
299 reg = <0xe001d180 0x24>;
301 clocks = <&clk32k 0>;
306 reg = <0xe0020000 0x8>;
312 #size-cells = <0>;
313 reg = <0xe0800000 0x100>;
321 reg = <0xe0808000 0x1000>;
330 reg = <0xe0808070 0x490>,
331 <0xe0808500 0x200>;
337 reg = <0xe080c000 0x400>, <0x20000000 0x10000000>;
346 #size-cells = <0>;
352 reg = <0xe0810000 0x400>, <0x30000000 0x10000000>;
361 #size-cells = <0>;
367 reg = <0xe0828000 0x100>, <0x100000 0x7800>;
377 bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
383 reg = <0xe082c000 0x100>, <0x100000 0xbc00>;
393 bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
399 reg = <0xe0830000 0x100>, <0x100000 0x10000>;
409 bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
415 reg = <0xe0834000 0x100>, <0x110000 0x4400>;
425 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
431 reg = <0xe0838000 0x100>, <0x110000 0x8800>;
441 bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
447 reg = <0xe083c000 0x100>, <0x110000 0xcc00>;
457 bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
463 reg = <0xe1000000 0x200>;
469 dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
482 reg = <0xe1204000 0x4000>;
495 reg = <0xe1208000 0x4000>;
508 reg = <0xe120c000 0x4000>;
521 reg = <0xe1404000 0x500>;
530 #size-cells = <0>;
531 port@0 {
532 reg = <0>;
551 reg = <0xe1408000 0x2000>;
555 #clock-cells = <0>;
572 reg = <0xe1604000 0x4000>;
581 reg = <0xe1608000 0x1000>;
583 #sound-dai-cells = <0>;
593 reg = <0xe160c000 0x1000>;
595 #sound-dai-cells = <0>;
604 #sound-dai-cells = <0>;
606 reg = <0xe1614000 0x4000>;
616 #sound-dai-cells = <0>;
618 reg = <0xe1618000 0x4000>;
628 #sound-dai-cells = <0>;
629 reg = <0xe161c000 0x4000>;
640 #sound-dai-cells = <0>;
641 reg = <0xe1620000 0x4000>;
652 reg = <0xe1628000 0xec>;
665 reg = <0xe1800000 0x4000>;
673 reg = <0xe1804000 0x4000>;
681 reg = <0xe1810000 0x100>;
692 reg = <0xe1814000 0x100>;
702 reg = <0xe1818000 0x200>;
706 ranges = <0x0 0xe1818000 0x800>;
711 reg = <0x200 0x200>;
727 reg = <0xe181c000 0x200>;
731 ranges = <0x0 0xe181c000 0x800>;
736 reg = <0x600 0x200>;
739 #size-cells = <0>;
751 reg = <0xe1824000 0x200>;
755 ranges = <0x0 0xe1824000 0x800>;
760 reg = <0x200 0x200>;
776 reg = <0xe2010000 0x100>;
784 reg = <0xe2014000 0x100>;
795 reg = <0xe2018000 0x200>;
799 ranges = <0x0 0xe2018000 0x800>;
804 reg = <0x200 0x200>;
821 reg = <0xe2024000 0x200>;
825 ranges = <0x0 0xe2024000 0x800>;
830 reg = <0x200 0x200>;
847 reg = <0xe2800000 0x1000>;
863 reg = <0xe2804000 0x1000>;
873 reg = <0xe2808000 0x1000>;
883 reg = <0xe280c000 0x1000>;
894 reg = <0xe1200000 0x1000>;
899 dma-requests = <0>;
906 #size-cells = <0>;
907 reg = <0xe2814000 0x100>;
915 reg = <0xe2818000 0x200>;
919 ranges = <0x0 0xe2818000 0x800>;
924 reg = <0x600 0x200>;
927 #size-cells = <0>;
939 reg = <0xe281c000 0x200>;
943 ranges = <0x0 0xe281c000 0x800>;
948 reg = <0x600 0x200>;
951 #size-cells = <0>;
963 reg = <0xe2824000 0x200>;
967 ranges = <0x0 0xe2824000 0x800>;
972 reg = <0x400 0x200>;
977 #size-cells = <0>;
988 reg = <0xe3800000 0x4000>;
993 reg = <0xe3804000 0x1000>;
998 reg = <0xe8c00000 0x100>;
1010 #address-cells = <0>;
1012 reg = <0xe8c11000 0x1000>,
1013 <0xe8c12000 0x2000>;