Lines Matching +full:sama7g5 +full:- +full:otpc
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/dma/at91.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/microchip,lan966x.h>
21 interrupt-parent = <&gic>;
22 #address-cells = <1>;
23 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-a7";
32 clock-frequency = <600000000>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <165625000>;
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <600000000>;
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <300000000>;
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <200000000>;
63 clks: clock-controller@e00c00a8 {
64 compatible = "microchip,lan966x-gck";
65 #clock-cells = <1>;
67 clock-names = "cpu", "ddr", "sys";
72 compatible = "arm,armv7-timer";
73 interrupt-parent = <&gic>;
78 clock-frequency = <37500000>;
82 compatible = "simple-bus";
83 #address-cells = <1>;
84 #size-cells = <1>;
88 compatible = "microchip,lan9662-udc",
89 "atmel,sama5d3-udc";
94 clock-names = "pclk", "hclk";
99 compatible = "microchip,lan966x-switch";
102 reg-names = "cpu", "gcb";
108 interrupt-names = "xtr", "fdma", "ana", "ptp",
109 "ptp-ext";
111 reset-names = "switch";
114 ethernet-ports {
115 #address-cells = <1>;
116 #size-cells = <0>;
161 compatible = "microchip,lan9668-otpc", "microchip,lan9662-otpc";
166 compatible = "atmel,sama5d2-flexcom";
169 #address-cells = <1>;
170 #size-cells = <1>;
175 compatible = "atmel,at91sam9260-usart";
180 dma-names = "tx", "rx";
182 clock-names = "usart";
183 atmel,fifo-size = <32>;
188 compatible = "atmel,at91rm9200-spi";
193 dma-names = "tx", "rx";
195 clock-names = "spi_clk";
196 atmel,fifo-size = <32>;
197 #address-cells = <1>;
198 #size-cells = <0>;
203 compatible = "microchip,sam9x60-i2c";
208 dma-names = "tx", "rx";
210 #address-cells = <1>;
211 #size-cells = <0>;
217 compatible = "atmel,sama5d2-flexcom";
220 #address-cells = <1>;
221 #size-cells = <1>;
226 compatible = "atmel,at91sam9260-usart";
231 dma-names = "tx", "rx";
233 clock-names = "usart";
234 atmel,fifo-size = <32>;
239 compatible = "atmel,at91rm9200-spi";
244 dma-names = "tx", "rx";
246 clock-names = "spi_clk";
247 atmel,fifo-size = <32>;
248 #address-cells = <1>;
249 #size-cells = <0>;
254 compatible = "microchip,sam9x60-i2c";
259 dma-names = "tx", "rx";
261 #address-cells = <1>;
262 #size-cells = <0>;
268 compatible = "atmel,at91sam9g45-trng";
274 compatible = "atmel,at91sam9g46-aes";
279 dma-names = "tx", "rx";
281 clock-names = "aes_clk";
285 compatible = "atmel,sama5d2-flexcom";
288 #address-cells = <1>;
289 #size-cells = <1>;
294 compatible = "atmel,at91sam9260-usart";
299 dma-names = "tx", "rx";
301 clock-names = "usart";
302 atmel,fifo-size = <32>;
307 compatible = "atmel,at91rm9200-spi";
312 dma-names = "tx", "rx";
314 clock-names = "spi_clk";
315 atmel,fifo-size = <32>;
316 #address-cells = <1>;
317 #size-cells = <0>;
322 compatible = "microchip,sam9x60-i2c";
327 dma-names = "tx", "rx";
329 #address-cells = <1>;
330 #size-cells = <0>;
336 compatible = "atmel,sama5d2-flexcom";
339 #address-cells = <1>;
340 #size-cells = <1>;
345 compatible = "atmel,at91sam9260-usart";
350 dma-names = "tx", "rx";
352 clock-names = "usart";
353 atmel,fifo-size = <32>;
358 compatible = "atmel,at91rm9200-spi";
363 dma-names = "tx", "rx";
365 clock-names = "spi_clk";
366 atmel,fifo-size = <32>;
367 #address-cells = <1>;
368 #size-cells = <0>;
373 compatible = "microchip,sam9x60-i2c";
378 dma-names = "tx", "rx";
380 #address-cells = <1>;
381 #size-cells = <0>;
386 dma0: dma-controller@e0068000 {
387 compatible = "microchip,sama7g5-dma";
390 #dma-cells = <1>;
392 clock-names = "dma_clk";
396 compatible = "atmel,at91sam9g46-sha";
400 dma-names = "tx";
402 clock-names = "sha_clk";
406 compatible = "atmel,sama5d2-flexcom";
409 #address-cells = <1>;
410 #size-cells = <1>;
415 compatible = "atmel,at91sam9260-usart";
420 dma-names = "tx", "rx";
422 clock-names = "usart";
423 atmel,fifo-size = <32>;
428 compatible = "atmel,at91rm9200-spi";
433 dma-names = "tx", "rx";
435 clock-names = "spi_clk";
436 atmel,fifo-size = <32>;
437 #address-cells = <1>;
438 #size-cells = <0>;
443 compatible = "microchip,sam9x60-i2c";
448 dma-names = "tx", "rx";
450 #address-cells = <1>;
451 #size-cells = <0>;
457 compatible = "snps,dw-apb-timer";
460 clock-names = "timer";
465 compatible = "snps,dw-wdt";
473 compatible = "microchip,lan966x-cpu-syscon", "syscon";
480 reg-names = "m_can", "message_ram";
483 interrupt-names = "int0", "int1";
485 clock-names = "hclk", "cclk";
486 assigned-clocks = <&clks GCK_ID_MCAN0>;
487 assigned-clock-rates = <40000000>;
488 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
495 reg-names = "m_can", "message_ram";
498 interrupt-names = "int0", "int1";
500 clock-names = "hclk", "cclk";
501 assigned-clocks = <&clks GCK_ID_MCAN1>;
502 assigned-clock-rates = <40000000>;
503 bosch,mram-cfg = <0x4000 0 0 64 0 0 32 32>;
507 reset: reset-controller@e200400c {
508 compatible = "microchip,lan966x-switch-reset";
510 reg-names = "gcb";
511 #reset-cells = <1>;
512 cpu-syscon = <&cpu_ctrl>;
516 compatible = "microchip,lan966x-pinctrl";
520 reset-names = "switch";
521 gpio-controller;
522 #gpio-cells = <2>;
523 gpio-ranges = <&gpio 0 0 78>;
524 interrupt-controller;
526 #interrupt-cells = <2>;
530 compatible = "microchip,lan966x-miim";
531 #address-cells = <1>;
532 #size-cells = <0>;
539 compatible = "microchip,lan966x-miim";
540 #address-cells = <1>;
541 #size-cells = <0>;
547 phy0: ethernet-phy@1 {
553 phy1: ethernet-phy@2 {
561 compatible = "microchip,sparx5-sgpio";
565 reset-names = "switch";
566 #address-cells = <1>;
567 #size-cells = <0>;
571 compatible = "microchip,sparx5-sgpio-bank";
573 gpio-controller;
574 #gpio-cells = <3>;
576 interrupt-controller;
577 #interrupt-cells = <3>;
581 compatible = "microchip,sparx5-sgpio-bank";
583 gpio-controller;
584 #gpio-cells = <3>;
589 compatible = "microchip,lan9668-hwmon";
592 reg-names = "pvt", "fan";
597 compatible = "microchip,lan966x-serdes";
600 #phy-cells = <2>;
604 gic: interrupt-controller@e8c11000 {
605 compatible = "arm,gic-400", "arm,cortex-a7-gic";
606 #interrupt-cells = <3>;
608 interrupt-controller;