Lines Matching +full:0 +full:x0200000
22 memory@0 {
24 reg = <0 0x00000000 0 0x80000000>; /* 2GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
31 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
48 reg = <0x3e>;
50 fan_gear_mode = <0>;
52 pwm_polarity = <0>;
58 reg = <0x48>;
60 fan_gear_mode = <0>;
62 pwm_polarity = <0>;
68 reg = <0x49>;
70 fan_gear_mode = <0>;
72 pwm_polarity = <0>;
78 reg = <0x4c>;
83 reg = <0x68>;
98 pinctrl-0 = <&ge0_rgmii_pins>;
107 pinctrl-0 = <&ge1_rgmii_pins>;
126 #clock-cells = <0>;
133 pinctrl-0 = <&sata1_led_pin &sata2_led_pin &err_led_pin
170 pinctrl-0 = <&power_button_pin &reset_button_pin>;
188 pinctrl-0 = <&poweroff>;
198 pcie@1,0 {
199 /* Port 0, Lane 0 */
204 pcie@2,0 {
205 /* Port 0, Lane 1 */
210 pcie@5,0 {
211 /* Port 1, Lane 0 */
217 phy0: ethernet-phy@0 { /* Marvell 88E1318 */
218 reg = <0>;
312 nand@0 {
313 reg = <0>;
314 label = "pxa3xx_nand-0";
315 nand-rb = <0>;
328 partition@0 {
330 reg = <0x0000000 0x180000>; /* 1.5MB */
336 reg = <0x180000 0x20000>; /* 128KB */
342 reg = <0x0200000 0x600000>; /* 6MB */
347 reg = <0x0800000 0x400000>; /* 4MB */
353 reg = <0x0c00000 0x7400000>; /* 116MB */