Lines Matching +full:0 +full:xffd04000
23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
75 <0 105 4>,
76 <0 106 4>,
77 <0 107 4>,
78 <0 108 4>,
79 <0 109 4>,
80 <0 110 4>,
81 <0 111 4>;
94 #address-cells = <0x1>;
95 #size-cells = <0x1>;
100 reg = <0xffc00000 0x1000>;
101 interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
109 reg = <0xffc01000 0x1000>;
110 interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
118 reg = <0xffd04000 0x1000>;
122 #size-cells = <0>;
125 #clock-cells = <0>;
130 #clock-cells = <0>;
135 #clock-cells = <0>;
140 #clock-cells = <0>;
146 #size-cells = <0>;
147 #clock-cells = <0>;
150 reg = <0x40>;
153 #clock-cells = <0>;
156 div-reg = <0xe0 0 9>;
157 reg = <0x48>;
161 #clock-cells = <0>;
164 div-reg = <0xe4 0 9>;
165 reg = <0x4C>;
169 #clock-cells = <0>;
172 div-reg = <0xe8 0 9>;
173 reg = <0x50>;
177 #clock-cells = <0>;
180 reg = <0x54>;
184 #clock-cells = <0>;
187 reg = <0x58>;
191 #clock-cells = <0>;
194 reg = <0x5C>;
200 #size-cells = <0>;
201 #clock-cells = <0>;
204 reg = <0x80>;
207 #clock-cells = <0>;
210 reg = <0x88>;
214 #clock-cells = <0>;
217 reg = <0x8C>;
221 #clock-cells = <0>;
224 reg = <0x90>;
228 #clock-cells = <0>;
231 reg = <0x94>;
235 #clock-cells = <0>;
238 reg = <0x98>;
242 #clock-cells = <0>;
245 reg = <0x9C>;
251 #size-cells = <0>;
252 #clock-cells = <0>;
255 reg = <0xC0>;
258 #clock-cells = <0>;
261 reg = <0xC8>;
265 #clock-cells = <0>;
268 reg = <0xCC>;
272 #clock-cells = <0>;
275 reg = <0xD0>;
279 #clock-cells = <0>;
282 reg = <0xD4>;
287 #clock-cells = <0>;
294 #clock-cells = <0>;
301 #clock-cells = <0>;
304 clk-gate = <0x60 0>;
308 #clock-cells = <0>;
315 #clock-cells = <0>;
318 div-reg = <0x64 0 2>;
319 clk-gate = <0x60 1>;
323 #clock-cells = <0>;
326 div-reg = <0x64 2 2>;
330 #clock-cells = <0>;
333 div-reg = <0x64 4 3>;
334 clk-gate = <0x60 2>;
338 #clock-cells = <0>;
341 div-reg = <0x64 7 3>;
342 clk-gate = <0x60 3>;
346 #clock-cells = <0>;
349 div-reg = <0x68 0 2>;
350 clk-gate = <0x60 4>;
354 #clock-cells = <0>;
357 div-reg = <0x68 2 2>;
358 clk-gate = <0x60 5>;
362 #clock-cells = <0>;
365 div-reg = <0x6C 0 3>;
366 clk-gate = <0x60 6>;
370 #clock-cells = <0>;
373 clk-gate = <0x60 7>;
377 #clock-cells = <0>;
380 clk-gate = <0x60 8>;
384 #clock-cells = <0>;
387 clk-gate = <0x60 9>;
391 #clock-cells = <0>;
394 clk-gate = <0xa0 0>;
398 #clock-cells = <0>;
401 clk-gate = <0xa0 1>;
405 #clock-cells = <0>;
408 clk-gate = <0xa0 2>;
409 div-reg = <0xa4 0 3>;
413 #clock-cells = <0>;
416 clk-gate = <0xa0 3>;
417 div-reg = <0xa4 3 3>;
421 #clock-cells = <0>;
424 clk-gate = <0xa0 4>;
425 div-reg = <0xa4 6 3>;
429 #clock-cells = <0>;
432 clk-gate = <0xa0 5>;
433 div-reg = <0xa4 9 3>;
437 #clock-cells = <0>;
440 clk-gate = <0xa0 6>;
441 div-reg = <0xa8 0 24>;
445 #clock-cells = <0>;
448 clk-gate = <0xa0 7>;
452 #clock-cells = <0>;
455 clk-gate = <0xa0 8>;
459 #clock-cells = <0>;
462 clk-gate = <0xa0 8>;
467 #clock-cells = <0>;
470 clk-gate = <0xa0 9>;
474 #clock-cells = <0>;
477 clk-gate = <0xa0 9>;
481 #clock-cells = <0>;
484 clk-gate = <0xa0 10>;
489 #clock-cells = <0>;
492 clk-gate = <0xa0 11>;
496 #clock-cells = <0>;
499 clk-gate = <0xd8 0>;
503 #clock-cells = <0>;
506 clk-gate = <0xd8 1>;
510 #clock-cells = <0>;
513 clk-gate = <0xd8 2>;
517 #clock-cells = <0>;
520 clk-gate = <0xd8 3>;
528 reg = <0xff400000 0x100000>;
536 reg = <0xff500000 0x10000>;
544 reg = <0xff600000 0x100000>;
552 reg = <0xffc25080 0x4>;
558 reg = <0xff706000 0x1000
559 0xffb90000 0x4>;
560 interrupts = <0 175 4>;
564 snps,wr_osr_lmt = <0xf>;
565 snps,rd_osr_lmt = <0xf>;
566 snps,blen = <0 0 0 0 16 0 0>;
571 altr,sysmgr-syscon = <&sysmgr 0x60 0>;
572 reg = <0xff700000 0x2000>;
573 interrupts = <0 115 4>;
590 altr,sysmgr-syscon = <&sysmgr 0x60 2>;
591 reg = <0xff702000 0x2000>;
592 interrupts = <0 120 4>;
609 #size-cells = <0>;
611 reg = <0xff708000 0x1000>;
616 porta: gpio-controller@0 {
621 reg = <0>;
624 interrupts = <0 164 4>;
630 #size-cells = <0>;
632 reg = <0xff709000 0x1000>;
637 portb: gpio-controller@0 {
642 reg = <0>;
645 interrupts = <0 165 4>;
651 #size-cells = <0>;
653 reg = <0xff70a000 0x1000>;
658 portc: gpio-controller@0 {
663 reg = <0>;
666 interrupts = <0 166 4>;
672 #size-cells = <0>;
674 reg = <0xffc04000 0x1000>;
677 interrupts = <0 158 0x4>;
683 #size-cells = <0>;
685 reg = <0xffc05000 0x1000>;
688 interrupts = <0 159 0x4>;
694 #size-cells = <0>;
696 reg = <0xffc06000 0x1000>;
699 interrupts = <0 160 0x4>;
705 #size-cells = <0>;
707 reg = <0xffc07000 0x1000>;
710 interrupts = <0 161 0x4>;
722 reg = <0xffd08140 0x4>;
723 interrupts = <0 36 1>, <0 37 1>;
728 reg = <0xffd08144 0x4>;
730 interrupts = <0 178 1>, <0 179 1>;
736 reg = <0xfffef000 0x1000>;
737 interrupts = <0 38 0x04>;
746 arm,double-linefill-incr = <0>;
748 arm,prefetch-drop = <0>;
754 reg = <0xff800000 0x1000>;
759 reg = <0xff704000 0x1000>;
760 interrupts = <0 139 4>;
761 fifo-depth = <0x400>;
763 #size-cells = <0>;
767 altr,sysmgr-syscon = <&sysmgr 0x108 3>;
772 #address-cells = <0x1>;
773 #size-cells = <0x0>;
775 reg = <0xff900000 0x100000>,
776 <0xffb80000 0x10000>;
778 interrupts = <0x0 0x90 0x4>;
787 reg = <0xffff0000 0x10000>;
793 #size-cells = <0>;
794 reg = <0xff705000 0x1000>,
795 <0xffa00000 0x1000>;
796 interrupts = <0 151 4>;
799 cdns,trigger-address = <0x00000000>;
808 reg = <0xffd05000 0x1000>;
809 altr,modrst-offset = <0x10>;
814 reg = <0xfffec000 0x100>;
819 reg = <0xffc25000 0x1000>;
826 interrupts = <0 39 4>;
832 #size-cells = <0>;
833 reg = <0xfff00000 0x1000>;
834 interrupts = <0 154 4>;
845 #size-cells = <0>;
846 reg = <0xfff01000 0x1000>;
847 interrupts = <0 155 4>;
857 reg = <0xffd08000 0x4000>;
863 reg = <0xfffec600 0x100>;
864 interrupts = <1 13 0xf01>;
870 interrupts = <0 167 4>;
871 reg = <0xffc08000 0x1000>;
880 interrupts = <0 168 4>;
881 reg = <0xffc09000 0x1000>;
890 interrupts = <0 169 4>;
891 reg = <0xffd00000 0x1000>;
900 interrupts = <0 170 4>;
901 reg = <0xffd01000 0x1000>;
910 reg = <0xffc02000 0x1000>;
911 interrupts = <0 162 4>;
923 reg = <0xffc03000 0x1000>;
924 interrupts = <0 163 4>;
935 #phy-cells = <0>;
942 reg = <0xffb00000 0xffff>;
943 interrupts = <0 125 4>;
955 reg = <0xffb40000 0xffff>;
956 interrupts = <0 128 4>;
968 reg = <0xffd02000 0x1000>;
969 interrupts = <0 171 4>;
977 reg = <0xffd03000 0x1000>;
978 interrupts = <0 172 4>;