Lines Matching +full:0 +full:xf01
20 #address-cells = <0>;
23 reg = <0xf8a01000 0x1000>, <0xf8a00100 0x100>;
31 ranges = <0 0xf8000000 0x8000000>;
41 reg = <0x00002000 0x1000>;
43 interrupts = <0 24 4>;
55 reg = <0x00a29000 0x1000>;
57 interrupts = <0 25 4>;
64 reg = <0x00a2a000 0x1000>;
66 interrupts = <0 26 4>;
73 reg = <0x00a2b000 0x1000>;
75 interrupts = <0 27 4>;
82 reg = <0x00a81000 0x1000>;
84 interrupts = <0 28 4>;
91 reg = <0x00b00000 0x1000>;
92 interrupts = <0 49 4>;
100 reg = <0x00006000 0x1000>;
101 interrupts = <0 50 4>;
109 reg = <0x00b02000 0x1000>;
110 interrupts = <0 51 4>;
118 reg = <0x00b03000 0x1000>;
119 interrupts = <0 52 4>;
127 reg = <0xb04000 0x1000>;
128 interrupts = <0 53 4>;
136 reg = <0xb20000 0x1000>;
137 interrupts = <0 108 0x4>;
149 reg = <0xb21000 0x1000>;
150 interrupts = <0 109 0x4>;
162 reg = <0xb22000 0x1000>;
163 interrupts = <0 110 0x4>;
175 reg = <0xb23000 0x1000>;
176 interrupts = <0 111 0x4>;
188 reg = <0xb24000 0x1000>;
189 interrupts = <0 112 0x4>;
201 reg = <0x004000 0x1000>;
202 interrupts = <0 113 0x4>;
214 reg = <0xb26000 0x1000>;
215 interrupts = <0 114 0x4>;
227 reg = <0xb27000 0x1000>;
228 interrupts = <0 115 0x4>;
240 reg = <0xb28000 0x1000>;
241 interrupts = <0 116 0x4>;
253 reg = <0xb29000 0x1000>;
254 interrupts = <0 117 0x4>;
266 reg = <0xb2a000 0x1000>;
267 interrupts = <0 118 0x4>;
279 reg = <0xb2b000 0x1000>;
280 interrupts = <0 119 0x4>;
292 reg = <0xb2c000 0x1000>;
293 interrupts = <0 120 0x4>;
305 reg = <0xb2d000 0x1000>;
306 interrupts = <0 121 0x4>;
318 reg = <0xb2e000 0x1000>;
319 interrupts = <0 122 0x4>;
331 reg = <0xb2f000 0x1000>;
332 interrupts = <0 123 0x4>;
344 reg = <0xb30000 0x1000>;
345 interrupts = <0 124 0x4>;
357 reg = <0xb31000 0x1000>;
358 interrupts = <0 125 0x4>;
370 arm,primecell-periphid = <0x00141805>;
371 reg = <0xa2c000 0x1000>;
372 interrupts = <0 29 4>;
381 reg = <0x00a00600 0x20>;
382 interrupts = <1 13 0xf01>;
387 reg = <0x00a10000 0x100000>;
388 interrupts = <0 15 4>;
393 sysctrl: system-controller@0 {
395 reg = <0x00000000 0x1000>;
401 offset = <0x4>;
402 mask = <0xdeadbeef>;
409 reg = <0x00a22000 0x2000>;
410 ranges = <0 0x00a22000 0x2000>;
412 clock: clock@0 {
414 reg = <0 0x2000>;
422 reg = <0x1830000 0x1000>;
423 interrupts = <0 35 4>;
431 reg = <0x1820000 0x1000>;
432 interrupts = <0 34 4>;
440 reg = <0x1840000 0x1000>,<0x184300c 0x4>;
441 interrupts = <0 71 4>;
449 reg = <0x1841000 0x1000>,<0x1843010 0x4>;
450 interrupts = <0 72 4>;
458 reg = <0x1890000 0x1000>;
459 interrupts = <0 66 4>;
465 reg = <0x1880000 0x1000>;
466 interrupts = <0 67 4>;
472 reg = <0xa20000 0x1000>;
477 reg = <0x1900000 0x10000>;
478 #phy-cells = <0>;
480 hisilicon,power-reg = <0x8 10>;
485 reg = <0x1900000 0x10000>;
486 interrupts = <0 70 4>;
492 reg = <0x001000 0x1000>;
493 interrupts = <0 47 4>;
500 reg = <0xb10000 0x1000>;
501 interrupts = <0 38 4>;
504 #size-cells = <0>;
510 reg = <0xb11000 0x1000>;
511 interrupts = <0 39 4>;
514 #size-cells = <0>;
520 reg = <0xb12000 0x1000>;
521 interrupts = <0 40 4>;
524 #size-cells = <0>;
530 reg = <0xb13000 0x1000>;
531 interrupts = <0 41 4>;
534 #size-cells = <0>;
540 reg = <0xb16000 0x1000>;
541 interrupts = <0 43 4>;
544 #size-cells = <0>;
550 reg = <0xb17000 0x1000>;
551 interrupts = <0 44 4>;
554 #size-cells = <0>;