Lines Matching +full:nsp +full:- +full:genpll
9 #include "bcm-ns.dtsi"
12 mpcore-bus@19000000 {
14 #clock-cells = <0>;
15 compatible = "brcm,nsp-armpll";
21 compatible = "arm,cortex-a9-twd-wdt";
30 #address-cells = <1>;
31 #size-cells = <1>;
35 #clock-cells = <0>;
36 compatible = "fixed-clock";
37 clock-frequency = <25000000>;
41 #clock-cells = <0>;
42 compatible = "fixed-factor-clock";
43 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
44 clock-div = <2>;
45 clock-mult = <1>;
49 #clock-cells = <0>;
50 compatible = "fixed-factor-clock";
51 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
52 clock-div = <4>;
53 clock-mult = <1>;
57 #clock-cells = <0>;
58 compatible = "fixed-factor-clock";
60 clock-div = <2>;
61 clock-mult = <1>;
66 compatible = "brcm,iproc-i2c";
69 #address-cells = <1>;
70 #size-cells = <0>;
71 clock-frequency = <100000>;
75 dmu-bus@1800c000 {
76 cru-bus@100 {
77 lcpll0: clock-controller@100 {
78 #clock-cells = <1>;
79 compatible = "brcm,nsp-lcpll0";
82 clock-output-names = "lcpll0", "pcie_phy",
86 genpll: clock-controller@140 {
87 #clock-cells = <1>;
88 compatible = "brcm,nsp-genpll";
91 clock-output-names = "genpll", "phy",
100 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
105 reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
113 interrupt-names = "mspi_done",
121 num-cs = <2>;
122 #address-cells = <1>;
123 #size-cells = <0>;
126 compatible = "jedec,spi-nor";
128 spi-max-frequency = <20000000>;
132 compatible = "brcm,bcm947xx-cfe-partitions";