Lines Matching +full:bcm2835 +full:- +full:firmware
1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
14 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
15 * bcm2835.dtsi and bcm2836.dtsi.
19 compatible = "brcm,bcm2835";
20 model = "BCM2835";
21 #address-cells = <1>;
22 #size-cells = <1>;
30 stdout-path = "serial0:115200n8";
33 rmem: reserved-memory {
34 #address-cells = <1>;
35 #size-cells = <1>;
39 compatible = "shared-dma-pool";
42 linux,cma-default;
46 thermal-zones {
47 cpu_thermal: cpu-thermal {
48 polling-delay-passive = <0>;
49 polling-delay = <1000>;
52 cpu-crit {
59 cooling-maps {
65 compatible = "simple-bus";
66 #address-cells = <1>;
67 #size-cells = <1>;
70 compatible = "brcm,bcm2835-system-timer";
77 clock-frequency = <1000000>;
81 compatible = "brcm,bcm2835-txp";
87 compatible = "brcm,bcm2835-cprman";
88 #clock-cells = <1>;
101 compatible = "brcm,bcm2835-mbox";
104 #mbox-cells = <0>;
108 compatible = "brcm,bcm2835-gpio";
115 * Since the BCM2835 only has 2 banks, the 2nd bank
123 gpio-controller;
124 #gpio-cells = <2>;
126 interrupt-controller;
127 #interrupt-cells = <2>;
129 gpio-ranges = <&gpio 0 0 54>;
138 dpi_gpio0: dpi-gpio0 {
144 emmc_gpio22: emmc-gpio22 {
148 emmc_gpio34: emmc-gpio34 {
158 emmc_gpio48: emmc-gpio48 {
163 gpclk0_gpio4: gpclk0-gpio4 {
167 gpclk1_gpio5: gpclk1-gpio5 {
171 gpclk1_gpio42: gpclk1-gpio42 {
175 gpclk1_gpio44: gpclk1-gpio44 {
179 gpclk2_gpio6: gpclk2-gpio6 {
183 gpclk2_gpio43: gpclk2-gpio43 {
189 i2c0_gpio0: i2c0-gpio0 {
193 i2c0_gpio28: i2c0-gpio28 {
197 i2c0_gpio44: i2c0-gpio44 {
201 i2c1_gpio2: i2c1-gpio2 {
205 i2c1_gpio44: i2c1-gpio44 {
210 jtag_gpio22: jtag-gpio22 {
215 pcm_gpio18: pcm-gpio18 {
219 pcm_gpio28: pcm-gpio28 {
224 sdhost_gpio48: sdhost-gpio48 {
229 spi0_gpio7: spi0-gpio7 {
233 spi0_gpio35: spi0-gpio35 {
237 spi1_gpio16: spi1-gpio16 {
241 spi2_gpio40: spi2-gpio40 {
246 uart0_gpio14: uart0-gpio14 {
255 uart0_ctsrts_gpio16: uart0-ctsrts-gpio16 {
259 uart0_ctsrts_gpio30: uart0-ctsrts-gpio30 {
264 uart0_gpio32: uart0-gpio32 {
269 uart0_gpio36: uart0-gpio36 {
273 uart0_ctsrts_gpio38: uart0-ctsrts-gpio38 {
278 uart1_gpio14: uart1-gpio14 {
282 uart1_ctsrts_gpio16: uart1-ctsrts-gpio16 {
286 uart1_gpio32: uart1-gpio32 {
290 uart1_ctsrts_gpio30: uart1-ctsrts-gpio30 {
294 uart1_gpio40: uart1-gpio40 {
298 uart1_ctsrts_gpio42: uart1-ctsrts-gpio42 {
310 clock-names = "uartclk", "apb_pclk";
311 arm,primecell-periphid = <0x00241011>;
315 compatible = "brcm,bcm2835-sdhost";
323 compatible = "brcm,bcm2835-i2s";
330 compatible = "brcm,bcm2835-spi";
334 #address-cells = <1>;
335 #size-cells = <0>;
340 compatible = "brcm,bcm2835-i2c";
344 #address-cells = <1>;
345 #size-cells = <0>;
350 compatible = "brcm,bcm2835-dpi";
354 clock-names = "core", "pixel";
359 compatible = "brcm,bcm2835-dsi0";
362 #address-cells = <1>;
363 #size-cells = <0>;
364 #clock-cells = <1>;
369 clock-names = "phy", "escape", "pixel";
371 clock-output-names = "dsi0_byte",
379 compatible = "brcm,bcm2835-aux";
380 #clock-cells = <1>;
386 compatible = "brcm,bcm2835-aux-uart";
394 compatible = "brcm,bcm2835-aux-spi";
398 #address-cells = <1>;
399 #size-cells = <0>;
404 compatible = "brcm,bcm2835-aux-spi";
408 #address-cells = <1>;
409 #size-cells = <0>;
414 compatible = "brcm,bcm2835-pwm";
417 assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
418 assigned-clock-rates = <10000000>;
419 #pwm-cells = <3>;
424 compatible = "brcm,bcm2835-sdhci";
432 compatible = "brcm,bcm2835-hvs";
438 compatible = "brcm,bcm2835-dsi1";
441 #address-cells = <1>;
442 #size-cells = <0>;
443 #clock-cells = <1>;
448 clock-names = "phy", "escape", "pixel";
450 clock-output-names = "dsi1_byte",
458 compatible = "brcm,bcm2835-i2c";
462 #address-cells = <1>;
463 #size-cells = <0>;
468 compatible = "brcm,bcm2835-usb";
471 #address-cells = <1>;
472 #size-cells = <0>;
474 clock-names = "otg";
476 phy-names = "usb2-phy";
482 clk_osc: clk-osc {
483 compatible = "fixed-clock";
484 #clock-cells = <0>;
485 clock-output-names = "osc";
486 clock-frequency = <19200000>;
489 clk_usb: clk-usb {
490 compatible = "fixed-clock";
491 #clock-cells = <0>;
492 clock-output-names = "otg";
493 clock-frequency = <480000000>;
498 compatible = "usb-nop-xceiv";
499 #phy-cells = <0>;