Lines Matching +full:0 +full:x3f1a0000
21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 secondary-boot-reg = <0x35004178>;
41 #address-cells = <0>;
43 reg = <0x3ff01000 0x1000>,
44 <0x3ff00100 0x100>;
49 reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
54 reg = <0x3e000000 0x118>;
64 reg = <0x3e001000 0x118>;
74 reg = <0x3e002000 0x118>;
84 reg = <0x3ff20000 0x1000>;
91 reg = <0x35001f00 0x24>;
96 reg = <0x35006000 0x1c>;
103 reg = <0x35003000 0x524>;
116 reg = <0x3f180000 0x801c>;
124 reg = <0x3f190000 0x801c>;
132 reg = <0x3f1a0000 0x801c>;
140 reg = <0x3f1b0000 0x801c>;
148 reg = <0x3e016000 0x70>;
151 #size-cells = <0>;
158 reg = <0x3e017000 0x70>;
161 #size-cells = <0>;
168 reg = <0x3e018000 0x70>;
171 #size-cells = <0>;
178 reg = <0x3e01c000 0x70>;
181 #size-cells = <0>;
197 #clock-cells = <0>;
203 #clock-cells = <0>;
209 #clock-cells = <0>;
215 #clock-cells = <0>;
221 #clock-cells = <0>;
227 #clock-cells = <0>;
233 #clock-cells = <0>;
239 #clock-cells = <0>;
245 #clock-cells = <0>;
251 #clock-cells = <0>;
257 #clock-cells = <0>;
263 #clock-cells = <0>;
269 #clock-cells = <0>;
275 #clock-cells = <0>;
281 #clock-cells = <0>;
288 reg = <0x35001000 0x0f00>;
295 reg = <0x35002000 0x0f00>;
302 reg = <0x3f001000 0x0f00>;
316 reg = <0x3e011000 0x0f00>;
330 reg = <0x3f120000 0x10000>;
341 reg = <0x3f130000 0x28>;
342 #phy-cells = <0>;