Lines Matching +full:0 +full:x3f1a0000

21 		#size-cells = <0>;
23 		cpu0: cpu@0 {
26 			reg = <0>;
33 			secondary-boot-reg = <0x3500417c>;
41 		#address-cells = <0>;
43 		reg = <0x3ff01000 0x1000>,
44 		      <0x3ff00100 0x100>;
49 		reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
54 		reg = <0x3e000000 0x1000>;
64 		reg = <0x3e001000 0x1000>;
74 		reg = <0x3e002000 0x1000>;
84 		reg = <0x3e003000 0x1000>;
94 		reg = <0x3ff20000 0x1000>;
101 		reg = <0x35002f40 0x6c>;
106 		reg = <0x35006000 0x1000>;
113 		reg = <0x35003000 0x800>;
128 		reg = <0x3f180000 0x10000>;
136 		reg = <0x3f190000 0x10000>;
144 		reg = <0x3f1a0000 0x10000>;
152 		reg = <0x3f1b0000 0x10000>;
160 		reg = <0x35004800 0x430>;
165 		reg = <0x3e016000 0x80>;
168 		#size-cells = <0>;
175 		reg = <0x3e017000 0x80>;
178 		#size-cells = <0>;
185 		reg = <0x3e018000 0x80>;
188 		#size-cells = <0>;
195 		reg = <0x3500d000 0x80>;
198 		#size-cells = <0>;
205 		reg = <0x3e01a000 0xcc>;
218 			reg = <0x35001000 0x0f00>;
225 			reg = <0x34000000 0x0f00>;
232 			reg = <0x35002000 0x0f00>;
241 			reg = <0x3f001000 0x0f00>;
254 			reg = <0x3e011000 0x0f00>;
269 			#clock-cells = <0>;
275 			#clock-cells = <0>;
281 			#clock-cells = <0>;
287 			#clock-cells = <0>;
293 			#clock-cells = <0>;
299 			#clock-cells = <0>;
305 			#clock-cells = <0>;
311 			#clock-cells = <0>;
317 			#clock-cells = <0>;
323 			#clock-cells = <0>;
331 			#clock-cells = <0>;
335 			#clock-cells = <0>;
341 			#clock-cells = <0>;
347 			#clock-cells = <0>;
353 			#clock-cells = <0>;
359 			#clock-cells = <0>;
365 			#clock-cells = <0>;
371 			#clock-cells = <0>;
377 			#clock-cells = <0>;
383 			#clock-cells = <0>;
389 			#clock-cells = <0>;
397 		reg = <0x3f120000 0x10000>;
408 		reg = <0x3f130000 0x28>;
409 		#phy-cells = <0>;