Lines Matching +full:0 +full:x1e600000
48 #size-cells = <0>;
54 reg = <0xf00>;
60 reg = <0xf01>;
78 reg = <0x1e6e0000 0x174>;
79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
95 reg = <0x40461000 0x1000>,
96 <0x40462000 0x1000>,
97 <0x40464000 0x2000>,
98 <0x40466000 0x2000>;
103 reg = <0x1e600000 0x100>;
107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
109 #size-cells = <0>;
114 flash@0 {
115 reg = < 0 >;
138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
140 #size-cells = <0>;
144 flash@0 {
145 reg = < 0 >;
161 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
163 #size-cells = <0>;
167 flash@0 {
168 reg = < 0 >;
192 reg = <0x1e650000 0x8>;
194 #size-cells = <0>;
197 pinctrl-0 = <&pinctrl_mdio1_default>;
203 reg = <0x1e650008 0x8>;
205 #size-cells = <0>;
208 pinctrl-0 = <&pinctrl_mdio2_default>;
214 reg = <0x1e650010 0x8>;
216 #size-cells = <0>;
219 pinctrl-0 = <&pinctrl_mdio3_default>;
225 reg = <0x1e650018 0x8>;
227 #size-cells = <0>;
230 pinctrl-0 = <&pinctrl_mdio4_default>;
236 reg = <0x1e660000 0x180>;
238 #size-cells = <0>;
246 reg = <0x1e680000 0x180>;
248 #size-cells = <0>;
256 reg = <0x1e670000 0x180>;
258 #size-cells = <0>;
266 reg = <0x1e690000 0x180>;
268 #size-cells = <0>;
276 reg = <0x1e6a1000 0x100>;
280 pinctrl-0 = <&pinctrl_usb2ah_default>;
286 reg = <0x1e6a3000 0x100>;
290 pinctrl-0 = <&pinctrl_usb2bh_default>;
296 reg = <0x1e6b0000 0x100>;
309 reg = <0x1e6a0000 0x350>;
315 pinctrl-0 = <&pinctrl_usb2ad_default>;
321 reg = <0x1e6a2000 0x300>;
325 pinctrl-0 = <&pinctrl_usb2bd_default>;
337 reg = <0x1e6d0000 0x200>;
345 reg = <0x1e6e2000 0x1000>;
346 ranges = <0 0x1e6e2000 0x1000>;
358 reg = <0x14 0x4 0x5b0 0x8>;
363 reg = <0x180 0x40>;
369 reg = <0x560 0x4>;
377 reg = <0x570 0x4>;
385 reg = <0x1e6e2524 0x4>;
392 reg = <0x1e6e6000 0x1000>;
403 reg = <0x1e6e7000 0x100>;
416 reg = <0x1e6e9000 0x100>;
426 reg = <0x1e6e9100 0x100>;
436 reg = <0x1e6f2000 0x1000>;
441 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
449 reg = <0x1e700000 0x1000>;
461 reg = <0x1e780000 0x400>;
463 gpio-ranges = <&pinctrl 0 0 208>;
474 reg = <0x1e780500 0x100>;
481 pinctrl-0 = <&pinctrl_sgpm1_default>;
489 reg = <0x1e780600 0x100>;
496 pinctrl-0 = <&pinctrl_sgpm2_default>;
504 reg = <0x1e780800 0x800>;
506 gpio-ranges = <&pinctrl 0 208 36>;
515 reg = <0x1e781000 0x18>;
522 reg = <0x1e782000 0x90>;
538 reg = <0x1e783000 0x20>;
546 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
552 reg = <0x1e784000 0x1000>;
561 reg = <0x1e785000 0x40>;
566 reg = <0x1e785040 0x40>;
572 reg = <0x1e785080 0x40>;
578 reg = <0x1e7850C0 0x40>;
584 reg = <0x1e78b000 0x100>;
595 reg = <0x1e789000 0x1000>;
600 ranges = <0x0 0x1e789000 0x1000>;
604 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
613 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
621 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
629 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
637 reg = <0x80 0x80>;
644 reg = <0x80 0x80>;
652 reg = <0xa0 0x24 0xc8 0x8>;
657 reg = <0x98 0x4>;
663 reg = <0x98 0x8>;
669 reg = <0x140 0x18>;
678 reg = <0x1e740000 0x100>;
681 ranges = <0 0x1e740000 0x10000>;
687 reg = <0x100 0x100>;
696 reg = <0x200 0x100>;
706 reg = <0x1e750000 0x100>;
709 ranges = <0 0x1e750000 0x10000>;
715 reg = <0x100 0x100>;
720 pinctrl-0 = <&pinctrl_emmc_default>;
726 reg = <0x1e787000 0x40>;
736 reg = <0x1e787800 0x40>;
746 reg = <0x1e788000 0x40>;
756 reg = <0x1e788800 0x40>;
766 reg = <0x1e78d000 0x20>;
774 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
780 reg = <0x1e78e000 0x20>;
788 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
794 reg = <0x1e78f000 0x20>;
802 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
808 reg = <0x1e790000 0x20>;
815 pinctrl-0 = <&pinctrl_uart6_default>;
822 reg = <0x1e790100 0x20>;
829 pinctrl-0 = <&pinctrl_uart7_default>;
836 reg = <0x1e790200 0x20>;
843 pinctrl-0 = <&pinctrl_uart8_default>;
850 reg = <0x1e790300 0x20>;
857 pinctrl-0 = <&pinctrl_uart9_default>;
866 ranges = <0 0x1e78a000 0x1000>;
871 reg = <0x1e79b000 0x94>;
874 pinctrl-0 = <&pinctrl_fsi1_default>;
881 reg = <0x1e79b100 0x94>;
884 pinctrl-0 = <&pinctrl_fsi2_default>;
891 reg = <0x1e79e000 0x1000>;
906 #size-cells = <0>;
907 reg = <0x80 0x80>;
914 pinctrl-0 = <&pinctrl_i2c1_default>;
920 #size-cells = <0>;
921 reg = <0x100 0x80>;
928 pinctrl-0 = <&pinctrl_i2c2_default>;
934 #size-cells = <0>;
935 reg = <0x180 0x80>;
942 pinctrl-0 = <&pinctrl_i2c3_default>;
948 #size-cells = <0>;
949 reg = <0x200 0x80>;
956 pinctrl-0 = <&pinctrl_i2c4_default>;
962 #size-cells = <0>;
963 reg = <0x280 0x80>;
970 pinctrl-0 = <&pinctrl_i2c5_default>;
976 #size-cells = <0>;
977 reg = <0x300 0x80>;
984 pinctrl-0 = <&pinctrl_i2c6_default>;
990 #size-cells = <0>;
991 reg = <0x380 0x80>;
998 pinctrl-0 = <&pinctrl_i2c7_default>;
1004 #size-cells = <0>;
1005 reg = <0x400 0x80>;
1012 pinctrl-0 = <&pinctrl_i2c8_default>;
1018 #size-cells = <0>;
1019 reg = <0x480 0x80>;
1026 pinctrl-0 = <&pinctrl_i2c9_default>;
1032 #size-cells = <0>;
1033 reg = <0x500 0x80>;
1040 pinctrl-0 = <&pinctrl_i2c10_default>;
1046 #size-cells = <0>;
1047 reg = <0x580 0x80>;
1054 pinctrl-0 = <&pinctrl_i2c11_default>;
1060 #size-cells = <0>;
1061 reg = <0x600 0x80>;
1068 pinctrl-0 = <&pinctrl_i2c12_default>;
1074 #size-cells = <0>;
1075 reg = <0x680 0x80>;
1082 pinctrl-0 = <&pinctrl_i2c13_default>;
1088 #size-cells = <0>;
1089 reg = <0x700 0x80>;
1096 pinctrl-0 = <&pinctrl_i2c14_default>;
1102 #size-cells = <0>;
1103 reg = <0x780 0x80>;
1110 pinctrl-0 = <&pinctrl_i2c15_default>;
1116 #size-cells = <0>;
1117 reg = <0x800 0x80>;
1124 pinctrl-0 = <&pinctrl_i2c16_default>;