Lines Matching +full:0 +full:x16000
27 ranges = <0x40000000 0x40000000 0x10000000>,
28 <0x10000000 0x10000000 0x00020000>;
31 interrupt-map-mask = <0 63>;
32 interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
33 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
34 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
35 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
36 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
37 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
38 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
39 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
40 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
41 <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
42 <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
43 <0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
44 <0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
45 <0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
46 <0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
47 <0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
48 <0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
49 <0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
50 <0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
51 <0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
52 <0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
53 <0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
54 <0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
55 <0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
56 <0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
57 <0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
58 <0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
59 <0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
60 <0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
61 <0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
62 <0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
63 <0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
64 <0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
65 <0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
66 <0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
67 <0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
68 <0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
69 <0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
70 <0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
71 <0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
72 <0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
73 <0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
74 <0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
77 arm,hbi = <0x190>;
78 arm,vexpress,site = <0>;
82 ranges = <0 0 0x40000000 0x04000000>,
83 <1 0 0x44000000 0x04000000>,
84 <2 0 0x48000000 0x04000000>,
85 <3 0 0x4c000000 0x04000000>,
86 <7 0 0x10000000 0x00020000>;
88 flash@0,00000000 {
90 reg = <0 0x00000000 0x04000000>,
91 <1 0x00000000 0x04000000>;
100 reg = <2 0x00000000 0x02000000>;
106 reg = <3 0x02000000 0x10000>;
118 reg = <3 0x03000000 0x20000>;
127 ranges = <0 7 0 0x20000>;
129 v2m_sysreg: sysreg@0 {
131 reg = <0x00000 0x1000>;
134 ranges = <0 0 0x1000>;
138 reg = <0x008 4>;
145 reg = <0x048 4>;
152 reg = <0x04c 4>;
160 reg = <0x01000 0x1000>;
165 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
172 reg = <0x02000 0x1000>;
175 #size-cells = <0>;
179 reg = <0x60>;
185 reg = <0x04000 0x1000>;
193 reg = <0x05000 0x1000>;
195 cd-gpios = <&v2m_mmc_gpios 0 0>;
196 wp-gpios = <&v2m_mmc_gpios 1 0>;
205 reg = <0x06000 0x1000>;
213 reg = <0x07000 0x1000>;
221 reg = <0x09000 0x1000>;
229 reg = <0x0a000 0x1000>;
237 reg = <0x0b000 0x1000>;
245 reg = <0x0c000 0x1000>;
253 reg = <0x0f000 0x1000>;
254 interrupts = <0>;
261 reg = <0x11000 0x1000>;
263 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
269 reg = <0x12000 0x1000>;
278 reg = <0x16000 0x1000>;
280 #size-cells = <0>;
284 reg = <0x39>;
288 #size-cells = <0>;
297 port@0 {
298 reg = <0>;
314 reg = <0x60>;
320 reg = <0x17000 0x1000>;
328 reg = <0x1a000 0x100
329 0x1a100 0xf00>;
336 reg = <0x1f000 0x1000>;
348 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
354 v2m_fixed_3v3: fixed-regulator-0 {
364 #clock-cells = <0>;
371 #clock-cells = <0>;
378 #clock-cells = <0>;
388 gpios = <&v2m_led_gpios 0 0>;
394 gpios = <&v2m_led_gpios 1 0>;
400 gpios = <&v2m_led_gpios 2 0>;
406 gpios = <&v2m_led_gpios 3 0>;
412 gpios = <&v2m_led_gpios 4 0>;
418 gpios = <&v2m_led_gpios 5 0>;
424 gpios = <&v2m_led_gpios 6 0>;
430 gpios = <&v2m_led_gpios 7 0>;
442 arm,vexpress-sysreg,func = <1 0>;
444 #clock-cells = <0>;
453 #clock-cells = <0>;
462 #clock-cells = <0>;
469 arm,vexpress-sysreg,func = <2 0>;
478 arm,vexpress-sysreg,func = <4 0>;
484 arm,vexpress-sysreg,func = <5 0>;
489 arm,vexpress-sysreg,func = <7 0>;
494 arm,vexpress-sysreg,func = <8 0>;
499 arm,vexpress-sysreg,func = <9 0>;
504 arm,vexpress-sysreg,func = <11 0>;