Lines Matching +full:opp +full:- +full:816000000
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a5";
24 next-level-cache = <&L2>;
26 enable-method = "amlogic,meson8b-smp";
28 operating-points-v2 = <&cpu_opp_table>;
30 #cooling-cells = <2>; /* min followed by max */
35 compatible = "arm,cortex-a5";
36 next-level-cache = <&L2>;
38 enable-method = "amlogic,meson8b-smp";
40 operating-points-v2 = <&cpu_opp_table>;
42 #cooling-cells = <2>; /* min followed by max */
47 compatible = "arm,cortex-a5";
48 next-level-cache = <&L2>;
50 enable-method = "amlogic,meson8b-smp";
52 operating-points-v2 = <&cpu_opp_table>;
54 #cooling-cells = <2>; /* min followed by max */
59 compatible = "arm,cortex-a5";
60 next-level-cache = <&L2>;
62 enable-method = "amlogic,meson8b-smp";
64 operating-points-v2 = <&cpu_opp_table>;
66 #cooling-cells = <2>; /* min followed by max */
70 cpu_opp_table: opp-table {
71 compatible = "operating-points-v2";
72 opp-shared;
74 opp-96000000 {
75 opp-hz = /bits/ 64 <96000000>;
76 opp-microvolt = <860000>;
78 opp-192000000 {
79 opp-hz = /bits/ 64 <192000000>;
80 opp-microvolt = <860000>;
82 opp-312000000 {
83 opp-hz = /bits/ 64 <312000000>;
84 opp-microvolt = <860000>;
86 opp-408000000 {
87 opp-hz = /bits/ 64 <408000000>;
88 opp-microvolt = <860000>;
90 opp-504000000 {
91 opp-hz = /bits/ 64 <504000000>;
92 opp-microvolt = <860000>;
94 opp-600000000 {
95 opp-hz = /bits/ 64 <600000000>;
96 opp-microvolt = <860000>;
98 opp-720000000 {
99 opp-hz = /bits/ 64 <720000000>;
100 opp-microvolt = <860000>;
102 opp-816000000 {
103 opp-hz = /bits/ 64 <816000000>;
104 opp-microvolt = <900000>;
106 opp-1008000000 {
107 opp-hz = /bits/ 64 <1008000000>;
108 opp-microvolt = <1140000>;
110 opp-1200000000 {
111 opp-hz = /bits/ 64 <1200000000>;
112 opp-microvolt = <1140000>;
114 opp-1320000000 {
115 opp-hz = /bits/ 64 <1320000000>;
116 opp-microvolt = <1140000>;
118 opp-1488000000 {
119 opp-hz = /bits/ 64 <1488000000>;
120 opp-microvolt = <1140000>;
122 opp-1536000000 {
123 opp-hz = /bits/ 64 <1536000000>;
124 opp-microvolt = <1140000>;
128 gpu_opp_table: opp-table-gpu {
129 compatible = "operating-points-v2";
131 opp-255000000 {
132 opp-hz = /bits/ 64 <255000000>;
133 opp-microvolt = <1100000>;
135 opp-364285714 {
136 opp-hz = /bits/ 64 <364285714>;
137 opp-microvolt = <1100000>;
139 opp-425000000 {
140 opp-hz = /bits/ 64 <425000000>;
141 opp-microvolt = <1100000>;
143 opp-510000000 {
144 opp-hz = /bits/ 64 <510000000>;
145 opp-microvolt = <1100000>;
147 opp-637500000 {
148 opp-hz = /bits/ 64 <637500000>;
149 opp-microvolt = <1100000>;
150 turbo-mode;
155 compatible = "arm,cortex-a5-pmu";
160 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
163 reserved-memory {
164 #address-cells = <1>;
165 #size-cells = <1>;
171 no-map;
175 thermal-zones {
177 polling-delay-passive = <250>; /* milliseconds */
178 polling-delay = <1000>; /* milliseconds */
179 thermal-sensors = <&thermal_sensor>;
181 cooling-maps {
184 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
193 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
202 soc_passive: soc-passive {
208 soc_hot: soc-hot {
214 soc_critical: soc-critical {
224 compatible = "simple-bus";
226 #address-cells = <1>;
227 #size-cells = <1>;
230 ddr_clkc: clock-controller@400 {
231 compatible = "amlogic,meson8b-ddr-clkc";
234 clock-names = "xtal";
235 #clock-cells = <1>;
239 compatible = "simple-bus";
241 #address-cells = <1>;
242 #size-cells = <1>;
245 canvas: video-lut@48 {
246 compatible = "amlogic,meson8b-canvas",
254 compatible = "simple-bus";
256 #address-cells = <1>;
257 #size-cells = <1>;
261 compatible = "amlogic,meson8b-mali", "arm,mali-450";
271 interrupt-names = "gp", "gpmmu", "pp", "pmu",
275 clock-names = "bus", "core";
276 operating-points-v2 = <&gpu_opp_table>;
277 #cooling-cells = <2>; /* min followed by max */
283 compatible = "amlogic,aiu-meson8b", "amlogic,aiu";
293 clock-names = "pclk",
307 compatible = "amlogic,meson8b-pmu", "syscon";
312 compatible = "amlogic,meson8b-aobus-pinctrl";
314 #address-cells = <1>;
315 #size-cells = <1>;
318 gpio_ao: ao-bank@14 {
322 reg-names = "mux", "pull", "gpio";
323 gpio-controller;
324 #gpio-cells = <2>;
325 gpio-ranges = <&pinctrl_aobus 0 0 16>;
328 i2s_am_clk_pins: i2s-am-clk-out {
332 bias-disable;
336 i2s_out_ao_clk_pins: i2s-ao-clk-out {
340 bias-disable;
344 i2s_out_lr_clk_pins: i2s-lr-clk-out {
348 bias-disable;
352 i2s_out_ch01_ao_pins: i2s-out-ch01 {
356 bias-disable;
360 spdif_out_1_pins: spdif-out-1 {
364 bias-disable;
372 bias-disable;
380 bias-disable;
387 compatible = "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc";
395 reset: reset-controller@4404 {
396 compatible = "amlogic,meson8b-reset";
398 #reset-cells = <1>;
401 analog_top: analog-top@81a8 {
402 compatible = "amlogic,meson8b-analog-top", "syscon";
407 compatible = "amlogic,meson8b-pwm";
409 #pwm-cells = <3>;
413 clock-measure@8758 {
414 compatible = "amlogic,meson8b-clk-measure";
419 compatible = "amlogic,meson8b-cbus-pinctrl";
421 #address-cells = <1>;
422 #size-cells = <1>;
430 reg-names = "mux", "pull", "pull-enable", "gpio";
431 gpio-controller;
432 #gpio-cells = <2>;
433 gpio-ranges = <&pinctrl_cbus 0 0 83>;
436 eth_rgmii_pins: eth-rgmii {
454 bias-disable;
458 eth_rmii_pins: eth-rmii {
470 bias-disable;
474 i2c_a_pins: i2c-a {
478 bias-disable;
482 sd_b_pins: sd-b {
487 bias-disable;
491 sdxc_c_pins: sdxc-c {
497 bias-pull-up;
501 pwm_c1_pins: pwm-c1 {
505 bias-disable;
509 pwm_d_pins: pwm-d {
513 bias-disable;
517 uart_b0_pins: uart-b0 {
522 bias-disable;
526 uart_b0_cts_rts_pins: uart-b0-cts-rts {
531 bias-disable;
538 ao_arc_sram: ao-arc-sram@0 {
539 compatible = "amlogic,meson8b-ao-arc-sram";
544 smp-sram@1ff80 {
545 compatible = "amlogic,meson8b-smp-sram";
552 compatible = "amlogic,meson8b-efuse";
554 clock-names = "core";
563 compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
572 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
573 rx-fifo-depth = <4096>;
574 tx-fifo-depth = <2048>;
577 reset-names = "stmmaceth";
579 power-domains = <&pwrc PWRC_MESON8_ETHERNET_MEM_ID>;
583 compatible = "amlogic,meson8b-gpio-intc",
584 "amlogic,meson-gpio-intc";
589 clkc: clock-controller {
590 compatible = "amlogic,meson8b-clkc";
592 clock-names = "xtal", "ddr_pll";
593 #clock-cells = <1>;
594 #reset-cells = <1>;
597 pwrc: power-controller {
598 compatible = "amlogic,meson8b-pwrc";
599 #power-domain-cells = <1>;
600 amlogic,ao-sysctrl = <&pmu>;
612 reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system",
616 clock-names = "vpu";
617 assigned-clocks = <&clkc CLKID_VPU>;
618 assigned-clock-rates = <182142857>;
623 compatible = "amlogic,meson8b-rng", "amlogic,meson-rng";
625 clock-names = "core";
641 arm,data-latency = <3 3 3>;
642 arm,tag-latency = <2 2 2>;
643 arm,filter-ranges = <0x100000 0xc0000000>;
644 prefetch-data = <1>;
645 prefetch-instr = <1>;
646 arm,prefetch-offset = <7>;
647 arm,double-linefill = <1>;
648 arm,prefetch-drop = <1>;
649 arm,shared-override;
654 compatible = "arm,cortex-a5-scu";
659 compatible = "arm,cortex-a5-global-timer";
672 compatible = "arm,cortex-a5-twd-timer";
680 compatible = "amlogic,meson8b-pwm";
684 compatible = "amlogic,meson8b-pwm";
688 compatible = "amlogic,meson8b-rtc";
693 compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
695 clock-names = "clkin", "core";
696 amlogic,hhi-sysctrl = <&hhi>;
697 nvmem-cells = <&temperature_calib>;
698 nvmem-cell-names = "temperature_calib";
702 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
708 clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
712 secbus2: system-controller@4000 {
713 compatible = "amlogic,meson8b-secbus2", "syscon";
719 compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
721 clock-names = "core", "clkin";
726 clock-names = "xtal", "pclk";
730 compatible = "amlogic,meson8b-uart", "amlogic,meson-ao-uart";
732 clock-names = "xtal", "pclk", "baud";
736 compatible = "amlogic,meson8b-uart";
738 clock-names = "xtal", "pclk", "baud";
742 compatible = "amlogic,meson8b-uart";
744 clock-names = "xtal", "pclk", "baud";
748 compatible = "amlogic,meson8b-uart";
750 clock-names = "xtal", "pclk", "baud";
754 compatible = "amlogic,meson8b-usb", "snps,dwc2";
756 clock-names = "otg";
760 compatible = "amlogic,meson8b-usb", "snps,dwc2";
762 clock-names = "otg";
766 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
768 clock-names = "usb_general", "usb";
773 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
775 clock-names = "usb_general", "usb";
780 compatible = "amlogic,meson8b-wdt";