Lines Matching +full:0 +full:x01c1d800
87 #clock-cells = <0>;
95 #clock-cells = <0>;
118 reg = <0x01000000 0x10000>;
129 compatible = "allwinner,sun8i-h3-de2-mixer-0";
130 reg = <0x01100000 0x100000>;
139 #size-cells = <0>;
153 reg = <0x01c02000 0x1000>;
163 reg = <0x01c0c000 0x1000>;
172 #size-cells = <0>;
174 tcon0_in: port@0 {
175 reg = <0>;
184 #size-cells = <0>;
197 reg = <0x01c0f000 0x1000>;
199 pinctrl-0 = <&mmc0_pins>;
205 #size-cells = <0>;
210 reg = <0x01c10000 0x1000>;
212 pinctrl-0 = <&mmc1_pins>;
218 #size-cells = <0>;
223 reg = <0x01c11000 0x1000>;
229 #size-cells = <0>;
234 reg = <0x1c14000 0x400>;
239 reg = <0x34 4>;
246 reg = <0x01c17000 0x1000>;
255 reg = <0x01c19000 0x400>;
260 phys = <&usbphy 0>;
262 extcon = <&usbphy 0>;
269 reg = <0x01c19400 0x2c>,
270 <0x01c1a800 0x4>,
271 <0x01c1b800 0x4>,
272 <0x01c1c800 0x4>,
273 <0x01c1d800 0x4>;
301 reg = <0x01c1a000 0x100>;
305 phys = <&usbphy 0>;
312 reg = <0x01c1a400 0x100>;
317 phys = <&usbphy 0>;
324 reg = <0x01c1b000 0x100>;
335 reg = <0x01c1b400 0x100>;
347 reg = <0x01c1c000 0x100>;
358 reg = <0x01c1c400 0x100>;
370 reg = <0x01c1d000 0x100>;
381 reg = <0x01c1d400 0x100>;
393 reg = <0x01c20000 0x400>;
402 reg = <0x01c20800 0x400>;
523 reg = <0x01c20c00 0xa0>;
532 reg = <0x01c30000 0x10000>;
543 #size-cells = <0>;
550 #size-cells = <0>;
558 #size-cells = <0>;
571 #size-cells = <0>;
578 reg = <0x01c62000 0x1000>,
579 <0x01c63000 0x1000>;
587 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
593 reg = <0x01c68000 0x1000>;
600 pinctrl-0 = <&spi0_pins>;
604 #size-cells = <0>;
609 reg = <0x01c69000 0x1000>;
616 pinctrl-0 = <&spi1_pins>;
620 #size-cells = <0>;
625 reg = <0x01c20ca0 0x20>;
631 #sound-dai-cells = <0>;
633 reg = <0x01c21000 0x400>;
645 reg = <0x01c21400 0x8>;
652 #sound-dai-cells = <0>;
654 reg = <0x01c22000 0x400>;
665 #sound-dai-cells = <0>;
667 reg = <0x01c22400 0x400>;
678 #sound-dai-cells = <0>;
680 reg = <0x01c22800 0x400>;
691 #sound-dai-cells = <0>;
693 reg = <0x01c22c00 0x400>;
706 reg = <0x01c28000 0x400>;
707 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
719 reg = <0x01c28400 0x400>;
732 reg = <0x01c28800 0x400>;
745 reg = <0x01c28c00 0x400>;
758 reg = <0x01c2ac00 0x400>;
763 pinctrl-0 = <&i2c0_pins>;
766 #size-cells = <0>;
771 reg = <0x01c2b000 0x400>;
776 pinctrl-0 = <&i2c1_pins>;
779 #size-cells = <0>;
784 reg = <0x01c2b400 0x400>;
789 pinctrl-0 = <&i2c2_pins>;
792 #size-cells = <0>;
797 reg = <0x01c81000 0x1000>,
798 <0x01c82000 0x2000>,
799 <0x01c84000 0x2000>,
800 <0x01c86000 0x2000>;
808 reg = <0x01cb0000 0x1000>;
816 pinctrl-0 = <&csi_pins>;
823 reg = <0x01ee0000 0x10000>;
837 #size-cells = <0>;
839 hdmi_in: port@0 {
840 reg = <0>;
855 reg = <0x01ef0000 0x10000>;
858 clock-names = "bus", "mod", "pll-0";
861 #phy-cells = <0>;
866 reg = <0x01f00000 0x400>;
880 reg = <0x01f00c00 0x400>;
886 reg = <0x01f01400 0x100>;
896 reg = <0x01f015c0 0x4>;
905 reg = <0x01f02000 0x400>;
911 reg = <0x01f02400 0x400>;
914 pinctrl-0 = <&r_i2c_pins>;
919 #size-cells = <0>;
924 reg = <0x01f02800 0x400>;
931 pinctrl-0 = <&r_uart_pins>;
937 reg = <0x01f02c00 0x400>;
971 reg = <0x01f03800 0x8>;
973 pinctrl-0 = <&r_pwm_pin>;