Lines Matching +full:1 +full:c19400
54 #address-cells = <1>;
55 #size-cells = <1>;
59 #address-cells = <1>;
60 #size-cells = <1>;
81 #address-cells = <1>;
93 cpu1: cpu@1 {
96 reg = <1>;
163 thermal-sensors = <&ths 1>;
169 #address-cells = <1>;
170 #size-cells = <1>;
182 #clock-cells = <1>;
183 #reset-cells = <1>;
196 #address-cells = <1>;
199 mixer0_out: port@1 {
200 reg = <1>;
209 compatible = "allwinner,sun8i-r40-de2-mixer-1";
218 #address-cells = <1>;
221 mixer1_out: port@1 {
222 reg = <1>;
249 syscon: system-control@1c00000 {
253 #address-cells = <1>;
254 #size-cells = <1>;
257 sram_c: sram@1d00000 {
260 #address-cells = <1>;
261 #size-cells = <1>;
272 nmi_intc: interrupt-controller@1c00030 {
280 dma: dma-controller@1c02000 {
289 #dma-cells = <1>;
292 spi0: spi@1c05000 {
301 #address-cells = <1>;
305 spi1: spi@1c06000 {
314 #address-cells = <1>;
318 csi0: csi@1c09000 {
332 video-codec@1c0e000 {
340 allwinner,sram = <&ve_sram 1>;
345 mmc0: mmc@1c0f000 {
357 #address-cells = <1>;
361 mmc1: mmc@1c10000 {
371 #address-cells = <1>;
375 mmc2: mmc@1c11000 {
387 #address-cells = <1>;
391 mmc3: mmc@1c12000 {
403 #address-cells = <1>;
407 usbphy: phy@1c13400 {
430 #phy-cells = <1>;
433 crypto: crypto@1c15000 {
442 spi2: spi@1c17000 {
451 #address-cells = <1>;
455 ahci: sata@1c18000 {
465 ehci1: usb@1c19000 {
471 phys = <&usbphy 1>;
476 ohci1: usb@1c19400 {
483 phys = <&usbphy 1>;
488 ehci2: usb@1c1c000 {
499 ohci2: usb@1c1c400 {
511 spi3: spi@1c1f000 {
520 #address-cells = <1>;
524 ccu: clock@1c20000 {
529 #clock-cells = <1>;
530 #reset-cells = <1>;
533 rtc: rtc@1c20400 {
539 #clock-cells = <1>;
542 pio: pinctrl@1c20800 {
744 timer@1c20c00 {
756 wdt: watchdog@1c20c90 {
763 ir0: ir@1c21800 {
776 ir1: ir@1c21c00 {
789 i2s0: i2s@1c22000 {
802 i2s1: i2s@1c22400 {
815 i2s2: i2s@1c22800 {
828 ths: thermal-sensor@1c24c00 {
836 #thermal-sensor-cells = <1>;
839 uart0: serial@1c28000 {
842 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
850 uart1: serial@1c28400 {
861 uart2: serial@1c28800 {
872 uart3: serial@1c28c00 {
883 uart4: serial@1c29000 {
894 uart5: serial@1c29400 {
905 uart6: serial@1c29800 {
916 uart7: serial@1c29c00 {
927 i2c0: i2c@1c2ac00 {
936 #address-cells = <1>;
940 i2c1: i2c@1c2b000 {
949 #address-cells = <1>;
953 i2c2: i2c@1c2b400 {
962 #address-cells = <1>;
966 i2c3: i2c@1c2b800 {
975 #address-cells = <1>;
979 can0: can@1c2bc00 {
988 i2c4: i2c@1c2c000 {
997 #address-cells = <1>;
1001 mali: gpu@1c40000 {
1023 gmac: ethernet@1c50000 {
1037 #address-cells = <1>;
1042 mbus: dram-controller@1c62000 {
1046 #address-cells = <1>;
1047 #size-cells = <1>;
1049 #interconnect-cells = <1>;
1052 tcon_top: tcon-top@1c70000 {
1071 #clock-cells = <1>;
1074 #address-cells = <1>;
1085 tcon_top_mixer0_out: port@1 {
1086 #address-cells = <1>;
1088 reg = <1>;
1094 tcon_top_mixer0_out_tcon_lcd1: endpoint@1 {
1095 reg = <1>;
1110 #address-cells = <1>;
1114 tcon_top_mixer1_in_mixer1: endpoint@1 {
1115 reg = <1>;
1121 #address-cells = <1>;
1129 tcon_top_mixer1_out_tcon_lcd1: endpoint@1 {
1130 reg = <1>;
1145 #address-cells = <1>;
1154 tcon_top_hdmi_in_tcon_tv1: endpoint@1 {
1155 reg = <1>;
1170 tcon_tv0: lcd-controller@1c73000 {
1181 #address-cells = <1>;
1185 #address-cells = <1>;
1194 tcon_tv0_in_tcon_top_mixer1: endpoint@1 {
1195 reg = <1>;
1200 tcon_tv0_out: port@1 {
1201 #address-cells = <1>;
1203 reg = <1>;
1205 tcon_tv0_out_tcon_top: endpoint@1 {
1206 reg = <1>;
1213 tcon_tv1: lcd-controller@1c74000 {
1224 #address-cells = <1>;
1228 #address-cells = <1>;
1237 tcon_tv1_in_tcon_top_mixer1: endpoint@1 {
1238 reg = <1>;
1243 tcon_tv1_out: port@1 {
1244 #address-cells = <1>;
1246 reg = <1>;
1248 tcon_tv1_out_tcon_top: endpoint@1 {
1249 reg = <1>;
1256 gic: interrupt-controller@1c81000 {
1267 hdmi: hdmi@1ee0000 {
1271 reg-io-width = <1>;
1283 #address-cells = <1>;
1294 hdmi_out: port@1 {
1295 reg = <1>;
1300 hdmi_phy: hdmi-phy@1ef0000 {
1305 clock-names = "bus", "mod", "pll-0", "pll-1";