Lines Matching +full:1 +full:c25000

51 	#address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
67 #address-cells = <1>;
68 #size-cells = <1>;
92 #address-cells = <1>;
93 #size-cells = <1>;
112 #address-cells = <1>;
113 #size-cells = <1>;
128 #address-cells = <1>;
129 #size-cells = <1>;
133 system-control@1c00000 {
136 #address-cells = <1>;
137 #size-cells = <1>;
143 #address-cells = <1>;
144 #size-cells = <1>;
158 #address-cells = <1>;
159 #size-cells = <1>;
170 sram_c: sram@1d00000 {
173 #address-cells = <1>;
174 #size-cells = <1>;
185 mbus: dram-controller@1c01000 {
189 #address-cells = <1>;
190 #size-cells = <1>;
192 #interconnect-cells = <1>;
195 dma: dma-controller@1c02000 {
203 nfc: nand-controller@1c03000 {
212 #address-cells = <1>;
216 spi0: spi@1c05000 {
226 #address-cells = <1>;
230 spi1: spi@1c06000 {
240 #address-cells = <1>;
244 tve0: tv-encoder@1c0a000 {
259 emac: ethernet@1c0b000 {
264 allwinner,sram = <&emac_sram 1>;
268 mdio: mdio@1c0b080 {
272 #address-cells = <1>;
276 tcon0: lcd-controller@1c0c000 {
294 #address-cells = <1>;
305 tcon0_out: port@1 {
306 #address-cells = <1>;
308 reg = <1>;
310 tcon0_out_tve0: endpoint@1 {
311 reg = <1>;
313 allwinner,tcon-channel = <1>;
319 video-codec@1c0e000 {
327 allwinner,sram = <&ve_sram 1>;
330 mmc0: mmc@1c0f000 {
339 #address-cells = <1>;
343 mmc1: mmc@1c10000 {
350 #address-cells = <1>;
354 mmc2: mmc@1c11000 {
361 #address-cells = <1>;
365 usb_otg: usb@1c13000 {
374 allwinner,sram = <&otg_sram 1>;
379 usbphy: phy@1c13400 {
380 #phy-cells = <1>;
391 ehci0: usb@1c14000 {
396 phys = <&usbphy 1>;
401 ohci0: usb@1c14400 {
406 phys = <&usbphy 1>;
411 crypto: crypto-engine@1c15000 {
420 spi2: spi@1c17000 {
430 #address-cells = <1>;
434 ccu: clock@1c20000 {
438 #clock-cells = <1>;
439 #reset-cells = <1>;
442 intc: interrupt-controller@1c20400 {
446 #interrupt-cells = <1>;
449 pio: pinctrl@1c20800 {
602 timer@1c20c00 {
614 wdt: watchdog@1c20c90 {
621 ir0: ir@1c21800 {
630 lradc: lradc@1c22800 {
637 codec: codec@1c22c00 {
650 sid: eeprom@1c23800 {
655 rtp: rtp@1c25000 {
662 uart0: serial@1c28000 {
665 interrupts = <1>;
672 uart1: serial@1c28400 {
682 uart2: serial@1c28800 {
692 uart3: serial@1c28c00 {
702 i2c0: i2c@1c2ac00 {
710 #address-cells = <1>;
714 i2c1: i2c@1c2b000 {
722 #address-cells = <1>;
726 i2c2: i2c@1c2b400 {
734 #address-cells = <1>;
738 mali: gpu@1c40000 {
750 timer@1c60000 {
757 fe0: display-frontend@1e00000 {
771 #address-cells = <1>;
774 fe0_out: port@1 {
775 reg = <1>;
784 be0: display-backend@1e60000 {
798 #address-cells = <1>;
809 be0_out: port@1 {
810 reg = <1>;