Lines Matching +full:s500 +full:- +full:sirq
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Actions Semi S500 SoC
5 * Copyright (c) 2016-2017 Andreas Färber
8 #include <dt-bindings/clock/actions,s500-cmu.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/owl-s500-powergate.h>
12 #include <dt-bindings/reset/actions,s500-reset.h>
15 compatible = "actions,s500";
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 compatible = "arm,cortex-a9";
34 enable-method = "actions,s500-smp";
39 compatible = "arm,cortex-a9";
41 enable-method = "actions,s500-smp";
46 compatible = "arm,cortex-a9";
48 enable-method = "actions,s500-smp";
49 power-domains = <&sps S500_PD_CPU2>;
54 compatible = "arm,cortex-a9";
56 enable-method = "actions,s500-smp";
57 power-domains = <&sps S500_PD_CPU3>;
61 arm-pmu {
62 compatible = "arm,cortex-a9-pmu";
67 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
71 compatible = "fixed-clock";
72 clock-frequency = <24000000>;
73 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <32768>;
79 #clock-cells = <0>;
83 compatible = "simple-bus";
84 #address-cells = <1>;
85 #size-cells = <1>;
89 compatible = "arm,cortex-a9-scu";
94 compatible = "arm,cortex-a9-global-timer";
101 compatible = "arm,cortex-a9-twd-timer";
108 compatible = "arm,cortex-a9-twd-wdt";
114 gic: interrupt-controller@b0021000 {
115 compatible = "arm,cortex-a9-gic";
118 interrupt-controller;
119 #interrupt-cells = <3>;
122 l2: cache-controller@b0022000 {
123 compatible = "arm,pl310-cache";
125 cache-unified;
126 cache-level = <2>;
128 arm,tag-latency = <3 3 2>;
129 arm,data-latency = <5 3 3>;
133 compatible = "actions,s500-uart", "actions,owl-uart";
141 compatible = "actions,s500-uart", "actions,owl-uart";
149 compatible = "actions,s500-uart", "actions,owl-uart";
157 compatible = "actions,s500-uart", "actions,owl-uart";
165 compatible = "actions,s500-uart", "actions,owl-uart";
173 compatible = "actions,s500-uart", "actions,owl-uart";
181 compatible = "actions,s500-uart", "actions,owl-uart";
188 cmu: clock-controller@b0160000 {
189 compatible = "actions,s500-cmu";
192 #clock-cells = <1>;
193 #reset-cells = <1>;
197 compatible = "actions,s500-i2c";
201 #address-cells = <1>;
202 #size-cells = <0>;
207 compatible = "actions,s500-i2c";
211 #address-cells = <1>;
212 #size-cells = <0>;
217 compatible = "actions,s500-i2c";
221 #address-cells = <1>;
222 #size-cells = <0>;
227 compatible = "actions,s500-i2c";
231 #address-cells = <1>;
232 #size-cells = <0>;
236 sirq: interrupt-controller@b01b0200 { label
237 compatible = "actions,s500-sirq";
239 interrupt-controller;
240 #interrupt-cells = <2>;
247 compatible = "actions,s500-timer";
253 interrupt-names = "2hz0", "2hz1", "timer0", "timer1";
256 sps: power-controller@b01b0100 {
257 compatible = "actions,s500-sps";
259 #power-domain-cells = <1>;
263 compatible = "actions,s500-pinctrl";
269 gpio-controller;
270 gpio-ranges = <&pinctrl 0 0 132>;
271 #gpio-cells = <2>;
272 interrupt-controller;
273 #interrupt-cells = <2>;
281 dma: dma-controller@b0260000 {
282 compatible = "actions,s500-dma";
288 #dma-cells = <1>;
289 dma-channels = <12>;
290 dma-requests = <46>;
292 power-domains = <&sps S500_PD_DMA>;
296 compatible = "actions,s500-mmc", "actions,owl-mmc";
302 dma-names = "mmc";
307 compatible = "actions,s500-mmc", "actions,owl-mmc";
313 dma-names = "mmc";
318 compatible = "actions,s500-mmc", "actions,owl-mmc";
324 dma-names = "mmc";
329 compatible = "actions,s500-emac", "actions,owl-emac";
333 clock-names = "eth", "rmii";