Lines Matching full:description
12 description:
43 description:
58 description:
83 - description: USB2/HS PHY
84 - description: USB3/SS PHY
100 description:
106 - description: Core
107 - description: Power management unit
113 description: Indicate if we don't want to enable USB2 HW LPM for host
118 description: Determines if platform is USB3 LPM capable
122 description: Indicate if we don't want to enable USB2 HW LPM for gadget
127 description:
133 description:
139 description: True when DWC3 was configured with LPM Erratum enabled
143 description: LPM NYET threshold
147 description: Set if we want to enable u2exit lfps quirk
151 description: Set if we enable P3 OK for U2/SS Inactive quirk
155 description:
160 description:
166 description: When set core will delay PHY power change from P0 to P1/P2/P3.
170 description: When set core will filter LFPS reception.
174 description:
180 description: When set core will set Tx de-emphasis value
184 description:
194 description: When set core will disable USB3 suspend phy
198 description: When set core will disable USB2 suspend phy
202 description:
208 description: Set if link entering into U1 needs to be disabled
212 description: Set if link entering into U2 needs to be disabled
216 description:
221 description:
227 description:
232 description: When set, disable u2mac linestate check during HS transmit
236 description:
241 description:
246 description:
252 description:
258 description:
263 description:
270 description:
278 description:
284 description: HIRD threshold
288 description:
295 description:
304 description:
315 description:
329 description:
345 description:
358 description:
371 description:
380 description:
389 description:
398 description:
407 description: Determines if the TX fifos can be dynamically resized depending
415 description: Specifies the max number of packets the txfifo resizing logic
423 description:
442 description:
448 description:
456 description: High Speed (HS) data bus.
460 description: Super Speed (SS) data bus.
464 description: