Lines Matching +full:imx8mp +full:- +full:dwc3
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: NXP iMX8MP Soc USB Controller
11 - Li Jun <jun.li@nxp.com>
15 const: fsl,imx8mp-dwc3
19 - description: Address and length of the register set for HSIO Block Control
20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC.
22 "#address-cells":
25 "#size-cells":
28 dma-ranges:
41 A list of phandle and clock-specifier pairs for the clocks
42 listed in clock-names.
44 - description: system hsio root clock.
45 - description: suspend clock, used for usb wakeup logic.
47 clock-names:
49 - const: hsio
50 - const: suspend
52 fsl,permanently-attached:
58 fsl,disable-port-power-control:
64 fsl,over-current-active-low:
69 fsl,power-active-low:
74 power-domains:
80 "^usb@[0-9a-f]+$":
81 $ref: snps,dwc3.yaml#
84 - compatible
85 - reg
86 - "#address-cells"
87 - "#size-cells"
88 - dma-ranges
89 - ranges
90 - clocks
91 - clock-names
92 - interrupts
93 - power-domains
98 - |
99 #include <dt-bindings/clock/imx8mp-clock.h>
100 #include <dt-bindings/power/imx8mp-power.h>
101 #include <dt-bindings/interrupt-controller/arm-gic.h>
103 compatible = "fsl,imx8mp-dwc3";
108 clock-names = "hsio", "suspend";
110 power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
111 #address-cells = <1>;
112 #size-cells = <1>;
113 dma-ranges = <0x40000000 0x40000000 0xc0000000>;
117 compatible = "snps,dwc3";
122 clock-names = "bus_early", "ref", "suspend";
123 assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
124 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
125 assigned-clock-rates = <500000000>;
128 phy-names = "usb2-phy", "usb3-phy";
129 snps,dis-u2-freeclk-exists-quirk;