Lines Matching +full:exynos +full:- +full:bus

1 Samsung Exynos SoC USB controller
3 The USB devices interface with USB controllers on Exynos SOCs.
8  - compatible: should be "samsung,exynos4210-ehci" for USB 2.0
10  - reg: physical base address of the controller and length of memory mapped
12  - interrupts: interrupt number to the cpu.
13  - clocks: from common clock binding: handle to usb clock.
14  - clock-names: from common clock binding: Shall be "usbhost".
15  - phys: from the *Generic PHY* bindings; array specifying phy(s) used
17  - phy-names: from the *Generic PHY* bindings; array of the names for
22  - samsung,vbus-gpio:  if present, specifies the GPIO that
23    needs to be pulled up for the bus to be powered.
28 		compatible = "samsung,exynos4210-ehci";
31 		samsung,vbus-gpio = <&gpx2 6 1 3 3>;
34 		clock-names = "usbhost";
37 		phy-names = "host";
42  - compatible: should be "samsung,exynos4210-ohci" for USB 2.0
44  - reg: physical base address of the controller and length of memory mapped
46  - interrupts: interrupt number to the cpu.
47  - clocks: from common clock binding: handle to usb clock.
48  - clock-names: from common clock binding: Shall be "usbhost".
49  - phys: from the *Generic PHY* bindings; array specifying phy(s) used
51  - phy-names: from the *Generic PHY* bindings; array of the names for
57 		compatible = "samsung,exynos4210-ohci";
62 		clock-names = "usbhost";
65 		phy-names = "host";
70  - compatible: should be one of the following -
71 	       "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on
73 	       "samsung,exynos5433-dwusb3": for USB 3.0 DWC3 controller on
75 	       "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7.
76  - #address-cells, #size-cells : should be '1' if the device has sub-nodes
78  - ranges: allows valid 1:1 translation between child's address space and
80  - clocks: Clock IDs array as required by the controller.
81  - clock-names: Names of clocks corresponding to IDs in the clock property.
84                  - samsung,exynos5250-dwusb3: "usbdrd30",
85                  - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk",
87                  - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk",
89  - vdd10-supply: 1.0V powr supply
90  - vdd33-supply: 3.0V/3.3V power supply
92 Sub-nodes:
93 The dwc3 core should be added as subnode to Exynos dwc3 glue.
94 - dwc3 :
100 		compatible = "samsung,exynos5250-dwusb3";
102 		clock-names = "usbdrd30";
103 		#address-cells = <1>;
104 		#size-cells = <1>;
106 		vdd10-supply = <&ldo11_reg>;
107 		vdd33-supply = <&ldo9_reg>;
113 			usb-phy = <&usb2_phy &usb3_phy>;