Lines Matching +full:power +full:- +full:active +full:- +full:low
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - fsl,imx27-usb
19 - lsi,zevio-usb
20 - nuvoton,npcm750-udc
21 - nvidia,tegra20-ehci
22 - nvidia,tegra20-udc
23 - nvidia,tegra30-ehci
24 - nvidia,tegra30-udc
25 - nvidia,tegra114-udc
26 - nvidia,tegra124-udc
27 - qcom,ci-hdrc
28 - items:
29 - enum:
30 - nvidia,tegra114-ehci
31 - nvidia,tegra124-ehci
32 - nvidia,tegra210-ehci
33 - const: nvidia,tegra30-ehci
34 - items:
35 - enum:
36 - fsl,imx23-usb
37 - fsl,imx25-usb
38 - fsl,imx28-usb
39 - fsl,imx35-usb
40 - fsl,imx50-usb
41 - fsl,imx51-usb
42 - fsl,imx53-usb
43 - fsl,imx6q-usb
44 - fsl,imx6sl-usb
45 - fsl,imx6sx-usb
46 - fsl,imx6ul-usb
47 - fsl,imx7d-usb
48 - fsl,vf610-usb
49 - const: fsl,imx27-usb
50 - items:
51 - enum:
52 - fsl,imx8dxl-usb
53 - fsl,imx8ulp-usb
54 - const: fsl,imx7ulp-usb
55 - const: fsl,imx6ul-usb
56 - items:
57 - enum:
58 - fsl,imx8mm-usb
59 - fsl,imx8mn-usb
60 - const: fsl,imx7d-usb
61 - const: fsl,imx27-usb
62 - items:
63 - enum:
64 - fsl,imx6sll-usb
65 - fsl,imx7ulp-usb
66 - const: fsl,imx6ul-usb
67 - const: fsl,imx27-usb
68 - items:
69 - const: xlnx,zynq-usb-2.20a
70 - const: chipidea,usb2
71 - items:
72 - enum:
73 - nuvoton,npcm845-udc
74 - const: nuvoton,npcm750-udc
88 clock-names:
94 power-domains:
100 reset-names:
103 "#reset-cells":
108 itc-setting:
114 ahb-burst-config:
125 tx-burst-size-dword:
128 register represents the maximum length of a the burst in 32-bit
130 of this property will only take effect if property "ahb-burst-config"
137 rx-burst-size-dword:
140 register represents the maximum length of a the burst in 32-bit words
142 this property will only take effect if property "ahb-burst-config"
153 should point to external connector device, which provide "USB-HOST"
156 $ref: /schemas/types.yaml#/definitions/phandle-array
159 - description: vbus extcon
160 - description: id extcon
162 phy-clkgate-delay-us:
164 The delay time (us) between putting the PHY into low power mode and
167 non-zero-ttctrl-ttha:
189 mux-controls:
196 mux-control-names:
199 operating-points-v2:
203 pinctrl-names:
206 In case of HSIC-mode, "idle" and "active" pin modes are mandatory.
208 strobe pin and the "active" state needs to pull up the strobe pin.
210 - items:
211 - const: idle
212 - const: active
213 - items:
214 - const: default
215 - enum:
216 - host
217 - device
218 - items:
219 - const: default
221 pinctrl-0:
224 pinctrl-1:
230 phy-names:
231 const: usb-phy
233 phy-select:
237 $ref: /schemas/types.yaml#/definitions/phandle-array
239 - description: phandle to TCSR node
240 - description: register offset
241 - description: phy index
243 vbus-supply:
248 Phandler of non-core register device, with one argument that
250 $ref: /schemas/types.yaml#/definitions/phandle-array
252 - items:
253 - description: phandle to usbmisc node
254 - description: index of usb controller
260 disable-over-current:
264 over-current-active-low:
266 description: over current signal polarity is active low
268 over-current-active-high:
271 Over current signal polarity is active high. It's recommended to
274 power-active-high:
276 description: power signal polarity is active high
278 external-vbus-divider:
280 description: enables off-chip resistor divider for Vbus
282 samsung,picophy-pre-emp-curr-control:
284 HS Transmitter Pre-Emphasis Current Control. This signal controls
286 pins after a J-to-K or K-to-J transition. The range is from 0x0 to
293 samsung,picophy-dc-vol-level-adjust:
295 HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
302 fsl,picophy-rise-fall-time-adjust:
305 of the high-speed transmitter waveform. It has no unit. The rise/fall
307 to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%)
314 usb-phy:
329 nvidia,needs-double-reset:
337 using the OF graph bindings specified, if the "usb-role-switch"
341 reset-gpios:
348 "^phy(-[0-9])?$":
351 $ref: /schemas/phy/qcom,usb-hs-phy.yaml
354 port: [ usb-role-switch ]
355 mux-controls: [ mux-control-names ]
358 - compatible
359 - reg
360 - interrupts
363 - $ref: usb-hcd.yaml#
364 - $ref: usb-drd.yaml#
365 - if:
370 - phy_type
373 pinctrl-names:
375 - const: idle
376 - const: active
379 pinctrl-names:
383 - items:
384 - const: default
385 - enum:
386 - host
387 - device
388 - items:
389 - const: default
390 - if:
395 - chipidea,usb2
396 - lsi,zevio-usb
397 - nuvoton,npcm750-udc
398 - nvidia,tegra20-udc
399 - nvidia,tegra30-udc
400 - nvidia,tegra114-udc
401 - nvidia,tegra124-udc
402 - qcom,ci-hdrc
403 - xlnx,zynq-usb-2.20a
407 disable-over-current: false
408 over-current-active-low: false
409 over-current-active-high: false
410 power-active-high: false
411 external-vbus-divider: false
412 samsung,picophy-pre-emp-curr-control: false
413 samsung,picophy-dc-vol-level-adjust: false
418 - |
419 #include <dt-bindings/interrupt-controller/arm-gic.h>
420 #include <dt-bindings/clock/berlin2.h>
428 phy-names = "usb-phy";
429 vbus-supply = <®_usb0_vbus>;
430 itc-setting = <0x4>; /* 4 micro-frames */
432 ahb-burst-config = <0x0>;
433 tx-burst-size-dword = <0x10>; /* 64 bytes */
434 rx-burst-size-dword = <0x10>;
436 phy-clkgate-delay-us = <400>;
437 mux-controls = <&usb_switch>;
438 mux-control-names = "usb_switch";
442 - |
443 #include <dt-bindings/interrupt-controller/arm-gic.h>
444 #include <dt-bindings/clock/imx6qdl-clock.h>
447 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
455 ahb-burst-config = <0x0>;
456 tx-burst-size-dword = <0x10>;
457 rx-burst-size-dword = <0x10>;
458 pinctrl-names = "idle", "active";
459 pinctrl-0 = <&pinctrl_usbh2_idle>;
460 pinctrl-1 = <&pinctrl_usbh2_active>;
461 #address-cells = <1>;
462 #size-cells = <0>;