Lines Matching +full:vcc +full:- +full:supply
3 UFSHC nodes are defined to describe on-chip UFS host controllers.
7 - compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
10 SoC-specific compatible along with "qcom,ufshc" and
12 "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
13 "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
14 "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
15 "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
16 "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
17 "qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
18 "qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
19 "qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
20 - interrupts : <interrupt mapping for UFS host controller IRQ>
21 - reg : <registers mapping>
24 - phys : phandle to UFS PHY node
25 - phy-names : the string "ufsphy" when is found in a node, along
27 - vdd-hba-supply : phandle to UFS host controller supply regulator node
28 - vcc-supply : phandle to VCC supply regulator node
29 - vccq-supply : phandle to VCCQ supply regulator node
30 - vccq2-supply : phandle to VCCQ2 supply regulator node
31 - vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V
32 or 2.7-3.6V. This boolean property when set, specifies
33 to use low voltage range of 1.7-1.95V. Note for external
34 UFS cards this property is invalid and valid VCC range is
35 always 2.7-3.6V.
36 - vcc-max-microamp : specifies max. load that can be drawn from vcc supply
37 - vccq-max-microamp : specifies max. load that can be drawn from vccq supply
38 - vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply
40 - clocks : List of phandle and clock specifier pairs
41 - clock-names : List of clock input name strings sorted in the same
49 - freq-table-hz : Array of <min max> operating frequencies stored in the same
54 -lanes-per-direction : number of lanes available per direction - either 1 or 2.
57 - #reset-cells : Must be <1> for Qualcomm UFS controllers that expose
59 - resets : reset node register
60 - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP.
61 - reset-gpios : A phandle and gpio specifier denoting the GPIO connected
64 Note: If above properties are not defined it can be assumed that the supply
69 compatible = "jedec,ufs-1.1";
73 vdd-hba-supply = <&xxx_reg0>;
74 vcc-supply = <&xxx_reg1>;
75 vcc-supply-1p8;
76 vccq-supply = <&xxx_reg2>;
77 vccq2-supply = <&xxx_reg3>;
78 vcc-max-microamp = 500000;
79 vccq-max-microamp = 200000;
80 vccq2-max-microamp = 200000;
83 clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
84 freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>;
86 reset-names = "rst";
88 phy-names = "ufsphy";
89 #reset-cells = <1>;