Lines Matching +full:gpio +full:- +full:lines

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dipen Patel <dipenp@nvidia.com>
14 known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
15 IRQ lines for the state change respectively, upon detection it will record
18 to enable or disable for the hardware timestamping. The GTE GPIO monitors
19 GPIO lines from the AON (always on) GPIO controller.
24 - nvidia,tegra194-gte-aon
25 - nvidia,tegra194-gte-lic
26 - nvidia,tegra234-gte-aon
27 - nvidia,tegra234-gte-lic
35 nvidia,int-threshold:
47 HTE lines are arranged in 32 bit slice where each bit represents different
54 nvidia,gpio-controller:
57 The phandle to AON gpio controller instance. This is required to handle
58 namespace conversion between GPIO and GTE.
60 '#timestamp-cells':
64 SoC technical reference manual. For the GTE GPIO, its value is same as
65 mentioned in the nvidia GPIO device tree binding document.
69 - compatible
70 - reg
71 - interrupts
72 - "#timestamp-cells"
75 - if:
80 - nvidia,tegra194-gte-aon
81 - nvidia,tegra234-gte-aon
87 - if:
92 - nvidia,tegra194-gte-lic
98 - if:
103 - nvidia,tegra234-gte-lic
109 - if:
114 - nvidia,tegra234-gte-aon
117 - nvidia,gpio-controller
122 - |
124 compatible = "nvidia,tegra194-gte-aon";
127 nvidia,int-threshold = <1>;
128 #timestamp-cells = <1>;
131 - |
133 compatible = "nvidia,tegra194-gte-lic";
136 nvidia,int-threshold = <1>;
137 #timestamp-cells = <1>;