Lines Matching +full:co +full:- +full:processor
2 C-SKY Multi-processors Timer
5 C-SKY multi-processors timer is designed for C-SKY SMP system and the
6 regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
8 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
9 - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
10 - PTIM_CCVR "cr<3, 14>" Current counter value reg.
11 - PTIM_LVR "cr<6, 14>" Window value reg to trigger next event.
21 - compatible
25 - clocks
29 - interrupts
35 ---------
41 interrupt-parent = <&intc>;