Lines Matching +full:hw +full:- +full:channels

3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
8 ADI controller has 50 channels including 2 software read/write channels and
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
14 triggered by hardware components instead of ADI software channels.
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
22 one system is reading/writing data by ADI software channels, that should be under
24 data by ADI software channels at the same time, or two parallel routine of setting
28 The new version ADI controller supplies multiple master channels for different
34 - compatible: Should be "sprd,sc9860-adi".
35 - reg: Offset and length of ADI-SPI controller register space.
36 - #address-cells: Number of cells required to define a chip select address
37 	on the ADI-SPI bus. Should be set to 1.
38 - #size-cells: Size of cells required to define a chip select address size
39 	on the ADI-SPI bus. Should be set to 0.
42 - hwlocks: Reference to a phandle of a hwlock provider node.
43 - hwlock-names: Reference to hwlock name strings defined in the same order
45 - sprd,hw-channels: This is an array of channel values up to 49 channels.
52 properties described in Documentation/devicetree/bindings/spi/spi-bus.txt.
56 		compatible = "sprd,sc9860-adi";
59 		hwlock-names = "adi";
60 		#address-cells = <1>;
61 		#size-cells = <0>;
62 		sprd,hw-channels = <30 0x8c20>;