Lines Matching +full:inactive +full:- +full:delay

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
11   be common properties like spi-max-frequency, spi-cpha, etc. or they could be
12   controller specific like delay in clock or data lines, etc. These properties
13   need to be defined in the peripheral node because they are per-peripheral and
19   - Mark Brown <broonie@kernel.org>
27         - minimum: 0
32   spi-cs-high:
37   spi-lsb-first:
42   spi-max-frequency:
47   spi-cs-setup-delay-ns:
49       Delay in nanoseconds to be introduced by the controller after CS is
52   spi-cs-hold-delay-ns:
54       Delay in nanoseconds to be introduced by the controller before CS is
55       de-asserted.
57   spi-cs-inactive-delay-ns:
59       Delay in nanoseconds to be introduced by the controller after CS is
60       de-asserted.
62   spi-rx-bus-width:
70   spi-rx-delay-us:
72       Delay, in microseconds, after a read transfer.
74   rx-sample-delay-ns:
75     description: SPI Rx sample delay offset, unit is nanoseconds.
76       The delay from the default sample time before the actual
79   spi-tx-bus-width:
87   spi-tx-delay-us:
89       Delay, in microseconds, after a write transfer.
91   stacked-memories:
99     $ref: /schemas/types.yaml#/definitions/uint64-array
103   parallel-memories:
112     $ref: /schemas/types.yaml#/definitions/uint64-array
116   st,spi-midi-ns:
118       Only for STM32H7, (Master Inter-Data Idleness) minimum time
119       delay in nanoseconds inserted between two consecutive data frames.
123   - $ref: arm,pl022-peripheral-props.yaml#
124   - $ref: cdns,qspi-nor-peripheral-props.yaml#
125   - $ref: samsung,spi-peripheral-props.yaml#
126   - $ref: nvidia,tegra210-quad-peripheral-props.yaml#