Lines Matching +full:spi +full:- +full:based

1 NVIDIA Tegra114 SPI controller.
4 - compatible : For Tegra114, must contain "nvidia,tegra114-spi".
5   Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
7 - reg: Should contain SPI registers location and length.
8 - interrupts: Should contain SPI interrupts.
9 - clock-names : Must include the following entries:
10   - spi
11 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries:
14   - spi
15 - dmas : Must contain an entry for each entry in clock-names.
17 - dma-names : Must include the following entries:
18   - rx
19   - tx
20 - clocks : Must contain an entry for each entry in clock-names.
21   See ../clocks/clock-bindings.txt for details.
24 - spi-max-frequency: Definition as per
25                      Documentation/devicetree/bindings/spi/spi-bus.txt
27 - nvidia,tx-clk-tap-delay: Delays the clock going out to the external device
29   Tegra SPI master with respect to outgoing Tegra SPI master clock.
30   Tap values vary based on the platform design trace lengths from Tegra SPI
32 - nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device
33   with this tap value. This property is used to adjust the Tegra SPI master
34   clock with respect to the data from the SPI slave device.
35   Tap values vary based on the platform design trace lengths from Tegra SPI
40 spi@7000d600 {
41 	compatible = "nvidia,tegra114-spi";
44 	spi-max-frequency = <25000000>;
45 	#address-cells = <1>;
46 	#size-cells = <0>;
48 	clock-names = "spi";
50 	reset-names = "spi";
52 	dma-names = "rx", "tx";
53 	<spi-client>@<bus_num> {
56 		nvidia,rx-clk-tap-delay = <0>;
57 		nvidia,tx-clk-tap-delay = <16>;