Lines Matching +full:espi +full:- +full:num +full:- +full:chipselects
4 - cell-index : QE SPI subblock index.
7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
9 - reg : Offset and length of the register set for the device
10 - interrupts : <a b> where a is the interrupt number and b is a
15 - clock-frequency : input clock frequency to non FSL_SOC cores
18 - cs-gpios : specifies the gpio pins to be used for chipselects.
21 - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
24 the cs-gpios property is not present.
28 cell-index = <0>;
32 interrupt-parent = <700>;
34 cs-gpios = <&gpio 18 1 // device reg=<0>
39 * eSPI (Enhanced Serial Peripheral Interface)
42 - compatible : should be "fsl,mpc8536-espi".
43 - reg : Offset and length of the register set for the device.
44 - interrupts : should contain eSPI interrupt, the device has one interrupt.
45 - fsl,espi-num-chipselects : the number of the chipselect signals.
48 - fsl,csbef: chip select assertion time in bits before frame starts
49 - fsl,csaft: chip select negation time in bits after frame ends
53 #address-cells = <1>;
54 #size-cells = <0>;
55 compatible = "fsl,mpc8536-espi";
58 interrupt-parent = <&mpic>;
59 fsl,espi-num-chipselects = <4>;