Lines Matching +full:tsd2d +full:- +full:ns

4 - compatible : should be one of the following:
5 	Generic default - "cdns,qspi-nor".
6 	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
7 	For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".
8 	For Intel LGM SoC - "intel,lgm-qspi", "cdns,qspi-nor".
9 - reg : Contains two entries, each of which is a tuple consisting of a
13 - interrupts : Unit interrupt specifier for the controller interrupt.
14 - clocks : phandle to the Quad SPI clock.
15 - cdns,fifo-depth : Size of the data FIFO in words.
16 - cdns,fifo-width : Bus width of the data FIFO in bytes.
17 - cdns,trigger-address : 32-bit indirect AHB trigger address.
20 - cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
21 - cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
28 - cdns,read-delay : Delay for read capture logic, in clock cycles
29 - cdns,tshsl-ns : Delay in nanoseconds for the length that the master
30                   mode chip select outputs are de-asserted between
32 - cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
33                   de-activated and the activation of another.
34 - cdns,tchsh-ns : Delay in nanoseconds between last bit of current
37 - cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
39 - resets	: Must contain an entry for each entry in reset-names.
41 - reset-names	: Must include either "qspi" and/or "qspi-ocp".
46 		compatible = "cdns,qspi-nor";
47 		#address-cells = <1>;
48 		#size-cells = <0>;
53 		cdns,is-decoded-cs;
54 		cdns,fifo-depth = <128>;
55 		cdns,fifo-width = <4>;
56 		cdns,trigger-address = <0x00000000>;
58 		reset-names = "qspi", "qspi-ocp";
62 			cdns,read-delay = <4>;
63 			cdns,tshsl-ns = <50>;
64 			cdns,tsd2d-ns = <50>;
65 			cdns,tchsh-ns = <4>;
66 			cdns,tslch-ns = <4>;