Lines Matching +full:qspi +full:- +full:nor

9 	io with 3-byte and 4-byte addressing support.
18 - #address-cells:
21 - #size-cells:
24 - compatible:
26 "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on BRCMSTB SoCs
27 "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi" : Second Instance of MSPI
29 "brcm,spi-bcm7425-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
31 "brcm,spi-bcm7429-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
33 "brcm,spi-bcm7435-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
35 "brcm,spi-bcm7445-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
37 "brcm,spi-bcm7216-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
39 "brcm,spi-bcm7278-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
41 "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on Cygnus, NSP
42 "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi" : NS2 SoCs
44 - reg:
48 - reg-names:
51 - "bspi_regs": BSPI register range, not required with compatible
52 "spi-brcmstb-mspi"
53 - "mspi_regs": MSPI register range is required for compatible strings
54 - "intr_regs", "intr_status_reg" : Interrupt and status register for
57 - interrupts
60 - interrupt-names:
62 - "mspi_halted" :
63 - "mspi_done": Indicates that the requested SPI operation is complete.
64 - "spi_lr_fullness_reached" : Linear read BSPI pipe full
65 - "spi_lr_session_aborted" : Linear read BSPI pipe aborted
66 - "spi_lr_impatient" : Linear read BSPI requested when pipe empty
67 - "spi_lr_session_done" : Linear read BSPI session done
69 - clocks:
75 - native-endian
79 - spi-rx-bus-width: Definition as per
80 Documentation/devicetree/bindings/spi/spi-bus.txt
86 SPI Master (MSPI+BSPI) for SPI-NOR access:
89 #address-cells = <0x1>;
90 #size-cells = <0x0>;
91 compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi";
93 reg-names = "cs_reg", "mspi", "bspi";
95 interrupt-parent = <0x1c>;
96 interrupt-names = "mspi_halted",
105 clock-names = "sw_spi";
108 #size-cells = <0x2>;
109 #address-cells = <0x2>;
112 spi-max-frequency = <0x2625a00>;
113 spi-cpol;
114 spi-cpha;
115 m25p,fast-read;
151 #address-cells = <1>;
152 #size-cells = <0>;
154 compatible = "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi";
156 reg-names = "mspi";
158 interrupt-parent = <&irq0_aon_intc>;
159 interrupt-names = "mspi_done";
164 qspi: spi@18027200 {
165 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
170 reg-names = "mspi_regs", "bspi_regs", "intr_regs", "intr_status_reg";
178 interrupt-names =
186 clock-names = "iprocmed";
187 num-cs = <2>;
188 #address-cells = <1>;
189 #size-cells = <0>;
195 qspi: spi@66470200 {
196 compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";
201 reg-names = "mspi", "bspi", "intr_regs",
204 interrupt-names = "spi_l1_intr";
206 clock-names = "iprocmed";
207 num-cs = <2>;
208 #address-cells = <1>;
209 #size-cells = <0>;
215 &qspi {
217 #address-cells = <1>;
218 #size-cells = <1>;
221 spi-max-frequency = <12500000>;
222 m25p,fast-read;
223 spi-cpol;
224 spi-cpha;