Lines Matching +full:gpio +full:- +full:op +full:- +full:cfg
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jayesh Choudhary <j-choudhary@ti.com>
15 - ti,dm646x-mcasp-audio
16 - ti,da830-mcasp-audio
17 - ti,am33xx-mcasp-audio
18 - ti,dra7-mcasp-audio
19 - ti,omap4-mcasp-audio
24 - description: CFG registers
25 - description: data registers
27 reg-names:
30 - const: mpu
31 - const: dat
33 op-mode:
35 description: 0 - I2S or 1 - DIT operation mode
37 - 0
38 - 1
40 tdm-slots:
48 serial-dir:
52 0 - Inactive, 1 - TX, 2 - RX
54 $ref: /schemas/types.yaml#/definitions/uint32-array
64 - description: transmission DMA channel
65 - description: reception DMA channel
67 dma-names:
70 - const: tx
71 - const: rx
79 tx-num-evt:
86 rx-num-evt:
97 0 - 3-state, 2 - logic low, 3 - logic high
99 - 0
100 - 2
101 - 3
106 - minItems: 1
108 - description: TX interrupt
109 - description: RX interrupt
110 - items:
111 - description: common/combined interrupt
113 interrupt-names:
115 - minItems: 1
117 - const: tx
118 - const: rx
119 - const: common
126 auxclk-fs-ratio:
130 gpio-controller: true
132 "#gpio-cells":
138 - description: functional clock
139 - description: module specific optional ahclkx clock
140 - description: module specific optional ahclkr clock
142 clock-names:
145 - const: fck
146 - const: ahclkx
147 - const: ahclkr
149 power-domains:
150 description: phandle to the corresponding power-domain
153 "#sound-dai-cells":
161 - compatible
162 - reg
163 - reg-names
164 - dmas
165 - dma-names
166 - interrupts
167 - interrupt-names
170 - $ref: dai-common.yaml#
171 - if:
175 - 0
179 - tdm-slots
184 - |
186 compatible = "ti,da830-mcasp-audio";
188 reg-names = "mpu";
190 interrupt-names = "tx", "rx";
191 op-mode = <0>; /* MCASP_IIS_MODE */
192 tdm-slots = <2>;
194 dma-names = "tx", "rx";
195 serial-dir = <
200 tx-num-evt = <1>;
201 rx-num-evt = <1>;