Lines Matching +full:ramp +full:- +full:up

5   - compatible : "cirrus,cs35l33"
7   - reg : the I2C address of the device for I2C
9   - VA-supply, VP-supply : power supplies for the device,
15   - reset-gpios : gpio used to reset the amplifier
17  -  interrupts : IRQ line info CS35L33.
18     (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21   - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
26   - cirrus,ramp-rate : On power up, it affects the time from when the power
27     up sequence begins to the time the audio reaches a full-scale output.
28     On power down, it affects the time from when the power-down sequence
30     is not set then soft ramping will be disabled and ramp time would be
31     20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,
34   - cirrus,boost-ipk : The maximum current allowed for the boost converter.
38   - cirrus,imon-adc-scale : Configures the scaling of data bits from the IMON
43 Optional H/G Algorithm sub-node:
45 The cs35l33 node can have a single "cirrus,hg-algo" sub-node that will enable
48   - cirrus,hg-algo : Sub-node for internal Class H/G algorithm that
51 Optional properties for the "cirrus,hg-algo" sub-node:
53   - cirrus,mem-depth : Memory depth for the Class H/G algorithm measured in
57     cirrus,release-rate : The number of consecutive LRCLK periods before
61   - cirrus,ldo-thld : Configures the signal threshold at which the PWM output
66   - cirrus,ldo-path-disable : This is a boolean property. If present, the H/G
70   - cirrus,ldo-entry-delay : The LDO entry delay in milliseconds before the H/G
75   - cirrus,vp-hg-auto : This is a boolean property.  When set, class H/G VPhg
78   - cirrus,vp-hg :  Class H/G algorithm VPhg.  Controls the H/G algorithm's
83   - cirrus,vp-hg-rate : The rate (number of LRCLK periods) at which the VPhg is
89   - cirrus,vp-hg-va : VA calculation reference for automatic VPhg tracking
91     1800mV with a step size of 50mV up to a maximum value of 1750mV.
100 	VA-supply = <&ldo5_reg>;
101 	VP-supply = <&ldo5_reg>;
103 	interrupt-parent = <&gpio8>;
106 	reset-gpios = <&cs47l91 34 0>;
108 	cirrus,ramp-rate = <0x0>;
109 	cirrus,boost-ctl = <0x30>;  /* VBST = 8000mV */
110 	cirrus,boost-ipk = <0xE0>; /* 3600mA */
111 	cirrus,imon-adc-scale = <0> /* Bits 15 down to 0 */
113 	cirrus,hg-algo {
114 		cirrus,mem-depth = <0x3>;
115 		cirrus,release-rate = <0x3>;
116 		cirrus,ldo-thld = <0x1>;
117 		cirrus,ldo-path-disable = <0x0>;
118 		cirrus,ldo-entry-delay=<0x4>;
119 		cirrus,vp-hg-auto;
120 		cirrus,vp-hg=<0xF>;
121 		cirrus,vp-hg-rate=<0x2>;
122 		cirrus,vp-hg-va=<0x0>;