Lines Matching refs:descriptor
6 processors(PDSP), linking RAM, descriptor pools and infrastructure
10 reading descriptor address to a particular memory mapped location. The PDSPs
13 descriptor RAM. Descriptor RAM is configurable as internal or external memory.
15 queue pool management (allocation, push, pop and notify) and descriptor
53 as free descriptor queues or the
72 the buffer for descriptor information. This firmware
81 entries : Size of the accumulator descriptor list
91 - descriptor-regions : child node describing the memory regions for keystone
97 <"# of descriptors" "descriptor size">.
99 descriptor in the region.
216 descriptor-regions {