Lines Matching +full:ahci +full:- +full:compatible
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC AHCI glue layer
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
14 logic handling signals to AHCI host controller inside AHCI component.
17 compatible:
19 - enum:
20 - socionext,uniphier-pro4-ahci-glue
21 - socionext,uniphier-pxs2-ahci-glue
22 - socionext,uniphier-pxs3-ahci-glue
23 - const: simple-mfd
28 "#address-cells":
31 "#size-cells":
37 "^reset-controller@[0-9a-f]+$":
38 $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
40 "phy@[0-9a-f]+$":
41 $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml#
44 - compatible
45 - reg
50 - |
51 sata-controller@65700000 {
52 compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd";
54 #address-cells = <1>;
55 #size-cells = <1>;
58 reset-controller@0 {
59 compatible = "socionext,uniphier-pxs3-ahci-reset";
61 clock-names = "link";
63 reset-names = "link";
65 #reset-cells = <1>;
69 compatible = "socionext,uniphier-pxs3-ahci-phy";
71 clock-names = "link", "phy";
73 reset-names = "link", "phy";
75 #phy-cells = <0>;